SI3201-FSR Silicon Laboratories Inc, SI3201-FSR Datasheet - Page 86

• Manufacturer Part Number: SI3201-FSR
• Description: SLIC 1-CH 60dB 41mA 3.3V/5V 16-Pin SOIC EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3201-FSR

• Package: 16SOIC EP
• Number Of Channels Per Chip: 1
• Longitudinal Balanced: 60 dB
• Loop Current: 41 mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3|5 V
• Typical Supply Current: 88 mA

Si3216
Register 68. Loop Closure/Ring Trip Detect Status
Reset settings = 0000_0000
Register 69. Loop Closure Debounce Interval
Reset settings = 0000_1010
86
Name
Name
Type
Type
Bit
7:3
Bit
6:0
2
1
0
7
Bit
Bit
Reserved
Reserved
LCDI[6:0]
DBIRAW
Name
Name
D7
D7
RTP
LCR
D6
D6
Read returns zero.
Ring Trip/Loop Closure Unfiltered Output.
The state of this bit reflects the real time output of ring trip and loop closure detect circuits
before debouncing.
0 = Ring trip/loop closure threshold exceeded.
1 = Ring trip/loop closure threshold not exceeded.
Ring Trip Detect Indicator (Filtered Output).
0 = Ring trip detect has not occurred.
1 = Ring trip detect occurred.
Loop Closure Detect Indicator (Filtered Output).
0 = Loop closure detect has not occurred.
1 = Loop closure detect has occurred.
Read returns zero.
Loop Closure Debounce Interval.
The value written to this register defines the minimum steady state debounce time. Value
may be set between 0 ms (0x00) to 159 ms (0x7F) in 1.25 ms steps. Default
value = 12.5 ms.
D5
D5
D4
D4
Rev. 1.0
LCDI[6:0]
R/W
D3
D3
Function
Function
DBIRAW
D2
D2
R
RTP
D1
D1
R
LCR
D0
D0
R