ON5402,518 NXP Semiconductors, ON5402,518 Datasheet - Page 8

• Manufacturer Part Number: ON5402,518
• Description: MOSFET RF 8SOIC
• Manufacturer: NXP Semiconductors

Specifications of ON5402,518

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 934059339518

voltage is the DDR RAM supply voltage, which can range from 1.8 V
Philips Semiconductors
APPLICATION INFORMATION
The NE57811 can be used in a variety of DDR memory
configurations. Its small footprint, fast transient response and
lessened need for large bulk output capacitance, makes it highly
adaptable. Some of these methods of use are given below.
Normal operating mode (V
The most common implementation of a DDR terminator regulator
using the NE57811 is shown in Figure 10. The NE57811 has an
internal resistor divider between the V
which maintains the output voltage, V
to 2.5 V. The center node of this resistor divider is the reference for
the V
There are two components to the memory signal load: a high
frequency component caused by the 266 MHz plus speed of the
address, data, and control buses, and a low frequency component
caused by the time-average skew of all of the bus states away from
an equal number of 1s and 0s. Electrolytic and tantalum capacitor
appear inductive at the high frequencies. Therefore two types of
capacitors are needed for the output filtering.
A very good, low ESR electrolyic capacitor of no less than 470 F
should be placed next to the terminator, which should be placed as
close as possible to the memory array. One half of the high
frequency filter capacitors should be to V
2003 Apr 02
Advanced DDR memory termination power
with shutdown
TT
output voltage and the buffered RefOut signal (pin 5).
GND
V
DD
C
TT
IN
TT
DD
= V
, at V
DD
(pin 2) and V
DDR
and the other half to
Figure 10. Normal operating method (V
DD
SHTDWN
/2. Typically, the V
/2)
4
SS
SHTDWN
(pin 3) pins
V
SS
3
NE57811
V
DD
DD
2
8
RefOut
V
voltage.
For different memory sizes, the values of the recommended output
filter capacitances will change. For a 256 MByte memory space, for
example, approximately 100 F of ceramic surface mount chip
capacitors should be evenly distributed across the physical memory
layout. Depending upon the PCB noise environment, this could be
10 pieces of 10 F, 20 pieces of 5 F, and so on.
It might be possible to reduce the total capacitance, provided the
performance remains stable. Examine the behavior of the V
carefully when the system is operating and verify that deviations in
the bus voltage do not exceed the DDR specification ( 40 mV).
Use of the SHTDWN signal and low power mode
The NE57811 provides an optional SHTDWN pin that may be used
to put the device into low power mode. When SHUTDOWN is
asserted (LOW), the V
is 3-Stated. This brings the quiescent current of the entire device to
less than 800 A.
If the pin is not externally connected, and internal 10 k resistor
biases the control logic to V
turned on and the NE57811 operates normally.
V
5
SS
TT
so that the output will better track any variations in the V
1
V
REF
TT
= V
C
(LF)
DD
OUT
(HF)
/2)
TT
power amplifier is turned off and the output
DD
causing the output sections to be
C
(HF)
OUT
SL01694
+V
GND
TT
NE57811
Product data
TT
DD
bus