MT48LC4M16A2P-75:G TR Micron Technology Inc, MT48LC4M16A2P-75:G TR Datasheet - Page 22

• Manufacturer Part Number: MT48LC4M16A2P-75:G TR
• Description: DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II T/R
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC4M16A2P-75:G TR

• Density: 64 Mb
• Maximum Clock Rate: 133 MHz
• Package: 54TSOP-II
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Organization: 4Mx16
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 140mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1088-2

Figure 8:
Figure 9:
READs
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
Activating a Specific Row in a Specific Bank
Example: Meeting
A0–A10, A11
COMMAND
READ bursts are initiated with a READ command, as shown in Figure 10 on page 23.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
generic READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following the CL after the READ command. Each subsequent data-out
element will be valid by the next positive clock edge. Figure 11 on page 24 shows general
timing for each possible CL setting.
Upon completion of a burst, assuming no other commands have been initiated, the DQs
will go High-Z. A full-page burst will continue until terminated. (At the end of the page, it
will wrap to column 0 and continue.)
BA0, BA1
CLK
RAS#
CAS#
WE#
CKE
CLK
CS#
t
RCD (MIN) When 2 <
ACTIVE
HIGH
T0
t CK
t
t RCD (MIN) +0.5 t CK
NOP
RCD (MIN)
ADDRESS
ADDRESS
T1
BANK
ROW
22
t CK
DON’T CARE
t
RCD (MIN)/
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
t CK
t
CK ≤ 3
READ or
DON’T CARE
WRITE
T3
64Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Commands