XC3S500E-5PQG208C Xilinx Inc, XC3S500E-5PQG208C Datasheet - Page 121
![FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP](/photos/6/71/67100/pq208_sml.jpg)
XC3S500E-5PQG208C
Manufacturer Part Number
XC3S500E-5PQG208C
Description
FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-5PQG208C
Package
208PQFP
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
657 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
158
Ram Bits
368640
Package / Case
208-MQFP, 208-PQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
0°C ~ 85°C
Number Of I /o
158
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S500E-5PQG208C
Manufacturer:
PERICOM
Quantity:
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Company:
Part Number:
XC3S500E-5PQG208C
Manufacturer:
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Quiescent Current Requirements
Table 79: Quiescent Supply Current Characteristics
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
4.
I
Symbol
I
CCAUXQ
CCINTQ
I
CCOQ
The numbers in this table are based on the conditions set forth in
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (T
= 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage
limits with V
design with no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional
elements), measured quiescent current levels may be different than the values in the table. For more accurate estimates for a specific
design, use the Xilinx® XPower tools.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3E XPower Estimator
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
R
Quiescent V
Quiescent V
Quiescent V
current
CCINT
= 1.26V, V
Description
CCINT
CCO
CCAUX
CCO
supply current
provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower
supply current XC3S100E
supply
= 3.465V, and V
CCAUX
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
Device
= 2.625V. The FPGA is programmed with a “blank” configuration data file (i.e., a
www.xilinx.com
Table
77.
Typical
0.8
0.8
0.8
1.5
1.5
15
25
50
65
12
18
35
45
8
8
(2)
J
of 25°C at V
Commercial
Maximum
DC and Switching Characteristics
106
259
366
1.0
1.0
1.0
2.0
2.0
27
78
12
22
31
52
76
CCINT
(2)
= 1.2 V, V
Maximum
Industrial
CCO
145
104
324
457
1.5
1.5
1.5
2.5
2.5
36
13
26
34
59
86
= 3.3V, and V
(2)
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
CCAUX
121
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