XC3S500E-5PQG208C Xilinx Inc, XC3S500E-5PQG208C Datasheet - Page 223
![FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP](/photos/6/71/67100/pq208_sml.jpg)
XC3S500E-5PQG208C
Manufacturer Part Number
XC3S500E-5PQG208C
Description
FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-5PQG208C
Package
208PQFP
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
657 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
158
Ram Bits
368640
Package / Case
208-MQFP, 208-PQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
0°C ~ 85°C
Number Of I /o
158
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S500E-5PQG208C
Manufacturer:
PERICOM
Quantity:
77
Company:
Part Number:
XC3S500E-5PQG208C
Manufacturer:
Xilinx Inc
Quantity:
10 000
- Current page: 223 of 233
- Download datasheet (6Mb)
DS312-4 (v3.8) August 26, 2009
Product Specification
VCCINT
VCCINT
VCCINT
RDWR_B
VCCAUX
VCCO_2
VCCO_2
VREF_0
INPUT
L15N_0
INPUT
L18N_2
L14N_0
L16P_0
L15P_0
L17P_2
L19P_2
GCLK6
GCLK4
GCLK5
GCLK0
GCLK3
GND
GND
GND
GND
11
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D5
M1
D1
M0
VCCINT
VCCINT
VCCINT
VCCAUX
VREF_2
INPUT
L14P_0
L12N_0
L12P_0
L13N_0
L13P_0
INPUT
L17N_2
INPUT
L20P_2
INPUT
L20N_2
L21N_2
L21P_2
L22N_2
L19N_2
GCLK1
GND
GND
GND
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DIN
M2
D0
R
VCCINT
VCCINT
VCCO_0
VREF_0
RH LK4
VREF_2
L10N_0
INPUT
L19N_1
INPUT
L24N_2
L09N_0
L10P_0
L11P_0
L16P_1
L23N_2
L24P_2
L22P_2
IRDY1
GND
GND
13
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A0
A6
C
VCCAUX
RHCLK5
RHCLK3
VCCO_2
L07N_0
INPUT
L08N_0
INPUT
L11N_0
INPUT
L16N_1
L15N_1
INPUT
L25N_2
INPUT
INPUT
L26N_2
L27N_2
L09P_0
L07P_0
L19P_1
TRDY1
L25P_2
L23P_2
GND
GND
A22
14
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A5
A7
Bank 0
Bank 2
VCCO_1
RHCLK2
L06N_0
L06P_0
INPUT
L05P_0
INPUT
L05N_0
INPUT
L08P_0
INPUT
L22N_1
INPUT
L15P_1
L11P_1
L11N_1
INPUT
L28N_2
L28P_2
INPUT
L26P_2
L27P_2
GND
GND
A23
15
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
VCCO_0
RHCLK1
RH LK0
INPUT
L02N_0
INPUT
L25N_1
L18N_1
L14N_1
L09N_1
INPUT
INPUT
L30N_2
INPUT
L29N_2
INPUT
L04P_0
L02P_0
L25P_1
L22P_1
L18P_1
L14P_1
L09P_1
L30P_2
L29P_2
A10
A21
A20
16
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A2
A1
A9
C
VCCAUX
VCCO_1
VCCO_1
VCCO_2
VREF_2
L04N_0
L01N_0
L01P_0
L27P_1
L23P_1
L20N_1
L12P_1
L07P_1
L05P_1
L02P_1
L01P_1
DONE
GND
TCK
TMS
A12
A14
A16
I/O
I/O
I/O
17
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF_0
VREF_1
www.xilinx.com
L03N_0
INPUT
L29N_1
L27N_1
INPUT
L23N_1
INPUT
INPUT
L12N_1
L07N_1
L05N_1
L02N_1
L01N_1
L31N_2
L29P_1
L20P_1
L10P_1
L31P_2
GND
LDC0
GND
HDC
VS1
A11
A13
A15
VS2
A19
A18
18
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCCO_1
VCCO_1
VCCO_1
VREF_1
VREF_1
VREF_1
L03P_0
L30N_1
INPUT
L26N_1
L21N_1
L21P_1
L13N_1
L13P_1
L10N_1
INPUT
L03P_1
L03N_1
L32N_2
L32P_2
GND
GND
CCLK
TDO
LDC2
VS0
I/O
I/O
I/O
I/O
I/O
A17
19
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF_1
RHCLK7
RHCLK6
VREF_1
INPUT
INPUT
INPUT
L30P_1
L28N_1
L28P_1
L26P_1
L24P_1
L24N_1
L17N_1
L17P_1
L08N_1
L08P_1
L06N_1
L06P_1
L04P_1
L04N_1
GND
LDC1
GND
GND
20
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A3
A4
DS312-4_09_101905
W
G
M
A
B
C
D
E
F
H
K
L
N
P
R
T
U
V
Y
J
FG400 Footprint
Right Half of Package
(top view)
Pinout Descriptions
223
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