XC3S500E-5PQG208C Xilinx Inc, XC3S500E-5PQG208C Datasheet - Page 22

FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP

XC3S500E-5PQG208C

Manufacturer Part Number
XC3S500E-5PQG208C
Description
FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S500E-5PQG208C

Package
208PQFP
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
657 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
158
Ram Bits
368640
Package / Case
208-MQFP, 208-PQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
0°C ~ 85°C
Number Of I /o
158
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
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XC3S500E-5PQG208C
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Part Number:
XC3S500E-5PQG208C
Manufacturer:
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Quantity:
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Part Number:
XC3S500E-5PQG208C
Manufacturer:
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Functional Description
.
22
Notes:
1.
2.
Options to invert signal polarity as well as other options that enable lines for various functions are not shown.
The index i can be 6, 7, or 8, depending on the slice. The upper SLICEL has an F8MUX, and the upper SLICEM has
an F7MUX. The lower SLICEL and SLICEM both have an F6MUX.
Figure 15: Simplified Diagram of the Left-Hand SLICEM
WF[4:1]
WS
DI
DI
D
www.xilinx.com
DS312-2 (v3.8) August 26, 2009
Product Specification
DS312-2_32_042007
R

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