XC3S700AN-4FG484I Xilinx Inc, XC3S700AN-4FG484I Datasheet - Page 16

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XC3S700AN-4FG484I

Manufacturer Part Number
XC3S700AN-4FG484I
Description
FPGA Spartan®-3AN Family 700K Gates 13248 Cells 667MHz 90nm Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheet

Specifications of XC3S700AN-4FG484I

Package
484FBGA
Family Name
Spartan®-3AN
Device Logic Units
13248
Device System Gates
700000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
372
Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Total Ram Bits
368640
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Quiescent Current Requirements
Table 12: Spartan-3AN FPGA Quiescent Supply Current Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
3.
4.
5.
Symbol
I
I
CCAUXQ
CCINTQ
I
CCOQ
The numbers in this table are based on the conditions set forth in
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. The internal SPI Flash is deselected (CSB = High); the internal SPI Flash current is consumed on the V
values are characterized using typical devices at room temperature (T
maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage limits with
V
functional elements instantiated). For conditions other than those described above (for example, a design including functional elements),
measured quiescent current levels will be different than the values in the table.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3AN FPGA XPower Estimator
XPower Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates. For more information on
power for the In-System Flash memory, see the Power Management chapter of UG333.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
For information on the power-saving Suspend mode, see XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs. Suspend mode
typically saves 40% total power consumption compared to quiescent current.
CCINT
= 1.26V, V
Quiescent V
Quiescent V
Quiescent V
CCO
Description
= 3.6V, and V
CCAUX
CCINT
CCO
supply current
supply current
supply current
CCAUX
provides quick, approximate, typical estimates, and does not require a netlist of the design, and b)
= 3.6V. The FPGA is programmed with a “blank” configuration data file (that is, a design with no
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
Device
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Table
J
of 25°C at V
10.
Typical
10.1
0.2
0.2
0.3
0.3
0.3
3.1
5.1
5.1
6.1
10
13
24
2
7
(2)
CCINT
= 1.2V, V
Commercial
Maximum
12.1
18.1
28.1
50.1
120
220
8.1
20
50
85
2
2
3
3
3
CCO
(2)
= 3.3V, and V
Industrial
Maximum
CCAUX
10.1
15.1
24.1
34.1
58.1
125
185
310
30
70
CCAUX
3
3
4
4
4
supply rail. Typical
(2)
= 3.3V). The
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
16

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