TEA5764UK-G NXP Semiconductors, TEA5764UK-G Datasheet - Page 30
TEA5764UK-G
Manufacturer Part Number
TEA5764UK-G
Description
Tuners FM RADIO WITH RDS
Manufacturer
NXP Semiconductors
Datasheet
1.TEA5764UKN2027.pdf
(65 pages)
Specifications of TEA5764UK-G
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
TEA5764UK/N2,027
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Philips Semiconductors
TEA5764UK_2
Product data sheet
10.4.2 Data overflow
During synchronization, after RDS data is read from the registers, new available blocks
are shifted to the registers as described in
are not read in time, the decoder cannot shift any new available block to the registers and
hence a data overflow will occur, this is indicated by bit DOVF which is set to 1. Bit DOVF
is reset by a read of the registers or if bit NWSY = 1 which results in the start of a new
synchronization search.
Each time when a RDS data block is decoded, bit DAVN goes to logic 0 to indicate the
presence of a new data block. Bit DAVN also triggers the interrupt output INTX. In
principle the microprocessor must now start reading and must have read all RDS data
(byte12R to byte19R) before the arrival of a new RDS data block. In the application it is
possible that there is too large a delay between the arrival of a new block and reading this
block. This can have various causes such as a microprocessor that has to start-up from
Sleep mode or when polling is used instead of interrupt based read actions.
shows the behavior of bit DAVFLG and bit DAVN when polling, where reading can occur at
any time. Note: Bit DAVN sets the INTX oneshot generator when DAVMSK = 1. Unlike
INTX, bit DAVN is not cleared by a read of the mask register.
Rev. 02 — 9 August 2005
Section 10.1
to
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Section
TEA5764UK
10.3. If the registers
FM radio + RDS
Figure 13
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