74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 4

• Manufacturer Part Number: 74LVC125APW-T
• Description: Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of 74LVC125APW-T

• Package: 14TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 4
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.4(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

Philips Semiconductors
2003 May 07
handbook, halfpage
handbook, halfpage
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
2OE
Fig.2 Pin configuration DHVQFN14.
1A
1Y
2A
2Y
Fig.4 Logic symbol (IEEE/IEC).
Top view
2
3
4
5
6
10
12
13
1
4
2
5
9
GND
1OE
EN1
7
1
GND
MNA229
V CC
1
(1)
3Y
14
8
11
MCE181
3
6
8
13
12
11
10
9
4OE
4A
4Y
3OE
3A
4
handbook, halfpage
handbook, halfpage
nOE
nA
Fig.5 Logic diagram.
Fig.3 Logic symbol.
10
12
13
2
1
5
4
9
1OE
2OE
3OE
4OE
1A
2A
3A
4A
MNA228
1Y
2Y
3Y
4Y
11
Product specification
3
6
8
74LVC125A
MNA227
nY