74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 7

no-image

74LVC125APW-T

Manufacturer Part Number
74LVC125APW-T
Description
Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC125APW-T

Package
14TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
4
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.4(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
Philips Semiconductors
Notes
1. All typical values are measured at V
2. For I/O ports the parameter I
2003 May 07
SYMBOL
T
V
V
V
V
I
I
I
I
LI
OZ
off
CC
amb
I
IH
IL
OH
OL
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
CC
= 40 to +125 C
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
input leakage current
3-state output OFF-state
current
power off leakage supply
quiescent supply current
additional quiescent supply
current per input pin
PARAMETER
OZ
includes the input leakage current.
CC
V
V
V
V
V
note 2
V
V
I
V
O
= 3.3 V and T
I
I
I
I
O
I
I
I
I
I
I
I
I
I
I
= V
= V
= 5.5 V or GND
= V
or V
= V
= 0
=V
O
O
O
O
O
O
O
= 5.5 V or GND;
= 100 A
= 12 mA
= 18 mA
= 24 mA
= 100 A
= 12 mA
= 24 mA
CC
IH
IH
IH
CC
O
TEST CONDITIONS
OTHER
or V
or V
or V
= 5.5 V
or GND;
0.6 V; I
IL
IL
IL
;
amb
7
O
= 25 C.
= 0 2.7 to 3.6
1.2
2.7 to 3.6
1.2
2.7 to 3.6
2.7 to 3.6
2.7
3.0
3.0
2.7 to 3.6
2.7
3.0
3.6
3.6
0.0
3.6
V
CC
(V)
V
2.0
V
V
V
V
CC
CC
CC
CC
CC
MIN.
0.3
0.65
0.75
1
TYP.
(1)
Product specification
74LVC125A
GND
0.8
0.3
0.6
0.8
40
5000
MAX.
20
20
20
V
V
V
V
V
V
V
V
V
V
V
UNIT
A
A
A
A
A

Related parts for 74LVC125APW-T