74LVC125APW-T NXP Semiconductors, 74LVC125APW-T Datasheet - Page 8

no-image

74LVC125APW-T

Manufacturer Part Number
74LVC125APW-T
Description
Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC125APW-T

Package
14TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
4
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.4(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
Philips Semiconductors
AC CHARACTERISTICS
GND = 0 V; t
Notes
1. All typical values are measured at V
2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
2003 May 07
T
t
t
t
t
T
t
t
t
t
SYMBOL
PHL
PZH
PHZ
sk(0)
PHL
PZH
PHZ
sk(0)
amb
amb
Quad buffer/line driver with 5 V tolerant input/outputs;
3-state
by design.
/t
/t
/t
/t
/t
/t
PLH
PLH
PZL
PLZ
PZL
PLZ
= 40 to +85 C
= 40 to +125 C
r
propagation delay nA to nY
3-state output enable time nOE to nY see Figs 7 and 8
3-state output disable time nOE to nY see Figs 7 and 8
skew
propagation delay nA to nY
3-state output enable time nOE to nY see Figs 7 and 8
3-state output disable time nOE to nY see Figs 7 and 8
skew
= t
f
2.5 ns.
PARAMETER
CC
= 3.3 V.
see Figs 6 and 8
note 2
see Figs 6 and 8
note 2
WAVEFORMS
TEST CONDITIONS
8
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
V
CC
(V)
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
1.5
1.0
MIN.
12
2.7
2.4
16
3.5
2.8
7.0
3.0
2.7
TYP.
(1)
(1)
(1)
Product specification
74LVC125A
5.5
4.8
6.6
5.4
5.0
4.6
1.0
7.0
6.0
8.5
7.0
6.5
6.0
1.5
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT

Related parts for 74LVC125APW-T