AD1674AR Analog Devices Inc, AD1674AR Datasheet - Page 7

• Manufacturer Part Number: AD1674AR
• Description: ADC Single SAR 100KSPS 12-Bit Parallel 28-Pin SOIC W
• Manufacturer: Analog Devices Inc

Specifications of AD1674AR

• Package: 28SOIC W
• Resolution: 12 Bit
• Sampling Rate: 100 KSPS
• Architecture: SAR
• Number Of Adcs: 1
• Number Of Analog Inputs: 2
• Digital Interface Type: Parallel
• Input Type: Voltage
• Polarity Of Input Voltage: Unipolar|Bipolar
• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 825mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)

REV. C
Symbol
AGND
A
BIP OFF
CE
CS
DB11–DB8
DB7–DB4
DB3–DB0
DGND
REF OUT
R/C
REF IN
STS
V
V
V
10 V
20 V
12/8
TYPE:
0
CC
EE
LOGIC
IN
IN
AI = Analog Input
AO = Analog Output
DI = Digital Input
DO = Digital Output
P
= Power
Pin No. Type
9
4
12
6
3
27–24
23–20
19–16
15
8
5
10
28
7
11
1
13
14
2
P
DI
AI
DI
DI
DO
DO
DO
P
AO
DI
AI
DO
P
P
P
AI
AI
DI
REF OUT
BIP OFF
REF IN
AGND
10V
20V
Data Bits 11 through 8. In the 12-bit format (see 12/8 and A
Data Bits 7 through 4. In the 12-bit format these pins provide the middle 4 bits of data. In the
Data Bits 3 through 0. In the 12-bit format these pins provide the lower 4 bits of data. In the
Name and Function
Analog Ground (Common).
Byte Address/Short Cycle. If a conversion is started with A
cycle is initiated. If A
results. During Read (R/C = 1) with 12/8 LOW, A
(DB4–DB11), and A
Bipolar Offset. Connect through a 50
Common for unipolar operation.
Chip Enable. Chip Enable is Active HIGH and is used to initiate a convert or read operation.
Chip Select. Chip Select is Active LOW.
per 4 bits of data. In the 8-bit format, they provide the upper 4 bits when A
disabled when A
8-bit format they provide the middle 4 bits when Ao is LOW and all zeroes when A
8-bit format these pins provide the lower 4 bits of data when A
when A
Digital Ground (Common).
+10 V Reference Output.
Read/Convert. In the full control mode R/C is Active HIGH for a read operation and Active LOW
for a convert operation. In the stand-alone mode, the falling edge of R/C initiates a conversion.
Reference Input is connected through a 50
Status is Active HIGH when a conversion is in progress and goes LOW when the conversion is
completed.
+12 V/+15 V Analog Supply.
–12 V/–15 V Analog Supply.
+5 V Logic Supply.
10 V Span Input, 0 V to +10 V unipolar mode or –5 V to +5 V bipolar mode. When using the
AD1674 in the 20 V Span 10 V
20 V Span Input, 0 V to +20 V unipolar mode or –10 V to +10 V bipolar mode. When using
the AD1674 in the 10 V Span 20 V
The 12/8 pin determines whether the digital output data is to be organized as two 8-bit words
(12/8 LOW) or a single 12-bit word (12/8 HIGH).
12/8
R/C
CE
CS
A
IN
IN
0
2.5k
2.5k
20k
5k
0
FUNCTIONAL BLOCK DIAGRAM
REF
10V
is LOW.
5k
SHA
0
10k
is HIGH.
CLOCK
10k
5k
PIN DESCRIPTION
CONTROL
0
0
= HIGH enables DB3–DB0 and sets DB7–DB4 = 0.
is Active HIGH during a convert start, a shorter 8-bit conversion cycle
IDAC
COMP
AD1674
SAR
–7–
DAC
IN
12
12
should not be connected.
IN
should not be connected.
resistor to REF OUT for bipolar operation or to Analog
12
resistor to +10 V Reference for normal operation.
STS
DB11 (MSB)
DB0 (LSB)
0
= LOW enables the 8 most significant bits
0
Active LOW, a full 12-bit conversion
REF OUT
BIP OFF
0
V
REF IN
AGND
pins), these pins provide the up-
LOGIC
10V
20V
PIN CONFIGURATION
0
12/8
R/C
V
V
CS
CE
is HIGH, they are disabled
A
CC
EE
IN
IN
0
10
11
12
13
14
4
1
2
3
5
6
7
8
9
(Not to Scale)
AD1674
TOP VIEW
0
is LOW and are
AD1674
23
22
20
19
18
17
16
15
28
27
26
25
24
21
STS
DB10
DGND
DB11(MSB)
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0(LSB)
0
is HIGH.