IDT77V106L25TFI8 IDT, Integrated Device Technology Inc, IDT77V106L25TFI8 Datasheet - Page 24

IDT77V106L25TFI8

Manufacturer Part Number
IDT77V106L25TFI8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT77V106L25TFI8

Data Rate
25.6/51.2Mbps
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
UTILITY BUS READ CYCLE
Trdpw
Name
Tcsrd
Tapw
Trdd
Ttria
IDT77V106L25
Tas
Tah
Tdh
Tch
Trid
Trd
Tar
AD[7:0]
ALE
WR
CS
Min
10
10
20
0
5
0
0
5
0
Max
10
18
0
(output)
AD[7:0]
AD[7:0]
(input)
ALE
Unit
RD
CS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Min. RD pulse width
Address Setup to ALE
Chip select to read enable
Address hold to ALE
ALE min pulse width
Address High-Z to RD assert
Data Valid hold time
RD deassert to CS deassert
RD deassert to data High-Z
Read Data access
ALE low to start of read
Start of read to Data low-Z
Address
Tas
Tapw
Description
Tas
Tapw
Address
Figure 19. Utility Bus Read Cycle
Figure 20. Utility Bus Write Cycle
Tah
Tcswr
Tah
Tcsrd
Tar
24
Utility Bus Write Cycle
Twrpw
Name
Tcswr
Tapw
Tdwh
Tdws
Taw
Tah
Tas
Tch
Trdd
Taw
Min
10
10
20
10
20
20
Twrpw
5
0
0
Tdws
Trdpw
Trd
Data (input)
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data
ALE min pulse width
Address set up to ALE
Address hold time to ALE
CS Assert to WR
Min. WR pulse width
Write Data hold time
WR deassert to CS deassert
ALE low to end of write
Write Data set up
Tch
Ttrid
Tdh
Description
Tdwh
3505 drw 43
Tch
3505 drw 44

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