KS8993F A5 Micrel Inc, KS8993F A5 Datasheet - Page 47

KS8993F A5

Manufacturer Part Number
KS8993F A5
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KS8993F A5

Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
KS8993F
3 MII Management (MIIM) Registers
The MIIM interface is used to access the MII PHY registers defined in this section. The SPI, I2C and SMI interfaces
can also be used to access these registers. The latter three interfaces use a different mapping mechanism than the
MIIM interface.
As defined in the IEEE 802.3 specification, the “PHYAD” are assigned as “0x1” for PHY port 1 and “0x2” for PHY port
2. The “REGAD” supported are 0,1,2,3,4 and 5. When the switch is in “center side media converter mode”. only PHY
port 1 is accessible after the PHYAD is programmed via the SPI, I2C or SMI interface.
Register 0: MII Basic Control
Register 1: MII Basic Status
August 26, 2004
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Register Number
0x6 – 0x1F
0x0
0x1
0x2
0x3
0x4
0x5
Name
Soft reset
Loop back
Force 100
AN enable
Power down
Isolate
Restart AN
Force full
duplex
Collision test
Reserved
Reserved
Force MDI
Disable MDI-X
Disable Far-
End fault
Disable
transmit
Disable LED
Name
Basic Control Register
Basic Status Register
Physical Identifier I
Physical Identifier II
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Not supported
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
RO
R/W
RO
RO
RO
R/W
R/W
R/W
R/W
Description
NOT SUPPORTED
NOT SUPPORTED
=1, 100 Mbps
=0, 10 Mbps
=1, Auto-Negotiation enabled
=0, Auto-Negotiation disabled
=1, power down
=0, normal operation
NOT SUPPORTED
=1, restart Auto-Negotiation
=0, normal operation
=1, full duplex
=0, half duplex
NOT SUPPORTED
=1, force MDI (transmit on RXP/RXM pins)
=0, normal operation (transmit on TXP/TXM pins)
=1, disable auto MDI/MDI-X
=0, normal operation
=1, disable Far-End fault detection
=0, normal operation
=1, disable transmit
=0, normal operation
=1, disable LED
=0, normal operation
Description
- 47 -
Description
Default
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
Default
Reference
Reg. 28, bit 6
Reg. 44, bit 6
Reg. 29, bit 3
Reg. 45, bit 3
Reg. 29, bit 5
Reg. 45, bit 5
Reg. 28, bit 5
Reg. 44, bit 5
Reg. 29, bit 1
Reg. 45, bit 1
Reg. 29, bit 2
Reg. 45, bit 2
Reg. 29, bit 4
Reg. 29, bit 6
Reg. 45, bit 6
Reg. 29, bit 7
Reg. 45, bit 7
Reference
Revision 1.0
Micrel

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