KSZ8995M A4 Micrel Inc, KSZ8995M A4 Datasheet - Page 4

• Manufacturer Part Number: KSZ8995M A4
• Manufacturer: Micrel Inc

Specifications of KSZ8995M A4

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.9/2.6/3.6V
• Operating Supply Voltage (min): 1.7/2.4/3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

KS8995M
Table of Contents
M9999-062309
System Level Applications ......................................................................................................................................... 7
Pin Description (by Number) ...................................................................................................................................... 9
Pin Description (by Name) ........................................................................................................................................ 15
Pin Configuration ...................................................................................................................................................... 21
Introduction
Functional Overview: Physical Layer Transceiver ................................................................................................ 22
Functional Overview: Switch Core .......................................................................................................................... 24
Advanced Functionality ............................................................................................................................................ 28
100BaseTX Transmit ........................................................................................................................................... 22
100BaseTX Receive ............................................................................................................................................ 22
PLL Clock Synthesizer ......................................................................................................................................... 22
Scrambler/De-scrambler (100BaseTX only) ........................................................................................................ 22
100BaseFX Operation ......................................................................................................................................... 22
100BaseFX Signal Detection ............................................................................................................................... 22
100BaseFX Far End Fault ................................................................................................................................... 23
10BaseT Transmit ............................................................................................................................................... 23
10BaseT Receive ................................................................................................................................................ 23
Power Management ............................................................................................................................................. 23
MDI/MDI-X Auto Crossover ................................................................................................................................. 23
Auto-Negotiation .................................................................................................................................................. 23
Address Look-Up ................................................................................................................................................. 24
Learning
Migration
Aging
Forwarding ........................................................................................................................................................... 24
Switching Engine ................................................................................................................................................. 24
MAC Operation .................................................................................................................................................... 24
MII Interface Operation ........................................................................................................................................ 26
SNI Interface Operation ....................................................................................................................................... 28
Spanning Tree Support ........................................................................................................................................ 28
Special Tagging Mode ......................................................................................................................................... 29
IGMP Support ...................................................................................................................................................... 30
Port Mirroring Support ......................................................................................................................................... 31
VLAN Support ...................................................................................................................................................... 31
Rate Limit Support ............................................................................................................................................... 32
Configuration Interface ........................................................................................................................................ 33
MII Management Interface (MIIM) ....................................................................................................................... 38
Inter-Packet Gap (IPG) ................................................................................................................................ 24
Backoff Algorithm ......................................................................................................................................... 24
Late Collision ............................................................................................................................................... 26
Illegal Frames .............................................................................................................................................. 26
Flow Control ................................................................................................................................................. 26
Half-Duplex Back Pressure .......................................................................................................................... 26
Broadcast Storm Protection ......................................................................................................................... 26
I2C Master Serial Bus Configuration ............................................................................................................ 35
SPI Slave Serial Bus Configuration ............................................................................................................. 35
........................................................................................................................................................... 22
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Micrel, Inc.
June 2009