KSZ8995M A4 Micrel Inc, KSZ8995M A4 Datasheet - Page 74

• Manufacturer Part Number: KSZ8995M A4
• Manufacturer: Micrel Inc

Specifications of KSZ8995M A4

• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.9/2.6/3.6V
• Operating Supply Voltage (min): 1.7/2.4/3V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

KS8995M
Reset Circuit Diagram
Micrel recommends the following discrete reset circuit as shown in Figure 23 when powering up the KS8995M device. For the
application where the reset circuit signal comes from another device (e.g. CPU, FPGA, etc.), we recommend the reset circuit
as shown in Figure 24.
At power-on-rest, R, C, and D1 provide the necessary ramp rise time to reset the Micrel device. The reset out from CPU/FPGA
provides warm reset after power up. It is also recommended to power up the VDD core voltage earlier than VDDIO voltage.
At worst case, both the VDD core and VDDIO voltages should come up at the same time.
M9999-062309
Figure 24. Recommended Circuit for Interfacing with CPU/FPGA Reset
KS8995M
Figure 23. Recommended Reset Circuit
RST
KS8995M
D1
D1: 1N4148
RST
10µF
VCC
C
74
D1
R
10k
D2
10µF
VCC
D1, D2: 1N4148
C
R
10k
RST_OUT_n
CPU/FPGA
Micrel, Inc.
June 2009