WG82574IT S LBAB Intel, WG82574IT S LBAB Datasheet - Page 406
WG82574IT S LBAB
Manufacturer Part Number
WG82574IT S LBAB
Description
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAB.pdf
(472 pages)
Specifications of WG82574IT S LBAB
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Compliant
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11.0
11.1
11.2
11.3
406
Diagnostics
To assist in test and debug of the software device driver, a set of software-usable
features have been provided in the component. These features include controls for
specific test-mode usage, as well as some registers for verifying the 82574’s internal
state against what the software device driver is expecting.
Introduction
The 82574 provides software visibility (and controllability) into certain major internal
data structures, including all of the transmit and receive FIFO space. However,
interlocks are not provided for any operations, so diagnostic accesses can only be
performed under very controlled circumstances.
The 82574 also provides software-controllable support for certain loopback modes, to
enable a software device driver to test transmit and receive flows to itself. Loopback
modes can also be used to diagnose communication problems and attempt to isolate
the location of a break in the communications path.
FIFO Pointer Accessibility
The 82574’s internal pointers into its transmit and receive data FIFOs are visible
through the head and tail diagnostic data FIFO registers. See
Diagnostics software can read these FIFO pointers to confirm an expected hardware
state following a sequence of operation(s). Diagnostic software can further write to
these pointers as a partial-step to verify expected FIFO contents following a specific
operation, or to subsequently write data directly to the data FIFOs.
FIFO Data Accessibility
The 82574’s internal transmit and receive data FIFOs contents are directly readable
and writeable through the PBM register. The specific locations read or written are
determined by the values of the FIFO pointers, which can be read and written. When
accessing the actual FIFO data structures, locations must be accessed as 32-bit words.
See
section
10.2.12.
82574 GbE Controller—Diagnostics
section
10.2.12.
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