ADM6996L-AA-T-1 Lantiq, ADM6996L-AA-T-1 Datasheet - Page 46

• Manufacturer Part Number: ADM6996L-AA-T-1
• Manufacturer: Lantiq

Specifications of ADM6996L-AA-T-1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

4.2
Table 19
Module
Serial
Table 20
Register Short Name
ChipID
PortStat_0
PortStat_1
CabStat
OverFlow_0
OverFlow_1
OverFlow_2
The register is addressed wordwise.
Table 21
Mode
read/write
read
Read only
Read virtual
Latch high,
self clearing
Latch low,
self clearing
Latch high,
mask clearing
Latch low,
mask clearing
Interrupt high,
self clearing
Interrupt low,
self clearing
Interrupt high,
mask clearing
Data Sheet
Serial Register Map
Registers Address SpaceRegisters Address Space
Registers Overview
Register Access Types
Symbol Description HW
rw
r
ro
rv
lhsc
llsc
lhmk
llmk
ihsc
ilsc
ihmk
Base Address
00
Register Long Name
Chip Identifier Register
Port Status Register 0
Port Status Register 1
Cable Broken Status
Over Flow Flag 0 Register 0
Over Flow Flag 0 Register 1
Over Flow Flag 2 Register
Register is used as input for the HW
Register is written by HW (register
between input and output -> one cycle
delay)
Register is set by HW (register between
input and output -> one cycle delay)
Physically, there is no new register, the
input of the signal is connected directly
to the address multiplexer.
Latch high signal at high level, clear on
read
Latch high signal at low-level, clear on
read
Latch high signal at high level, register
cleared with written mask
Latch high signal at low-level, register
cleared on read
Differentiate the input signal (low-
>high) register cleared on read
Differentiate the input signal (high-
>low) register cleared on read
Differentiate the input signal (high-
>low) register cleared with written mask
H
End Address
3C
H
46
Registers DescriptionSerial Register Map
Description SW
Register is read and writable by SW
Value written by software is ignored by
hardware; that is, software may write any
value to this field without affecting hardware
behavior (= Target for development.)
SW can only read this register
SW can only read this register
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register, with write mask
the register can be cleared (1 clears)
SW can read the register
SW can read the register
SW can read the register, with write mask
the register can be cleared
Note
Offset Address
00
01
02
03
3A
3B
3C
H
H
H
H
H
H
H
Rev. 1.13, 2005-11-22
ADM6996L/LX
Page Number
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Data Sheet