ADM6996L-AA-T-1 Lantiq, ADM6996L-AA-T-1 Datasheet - Page 55

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ADM6996L-AA-T-1

Manufacturer Part Number
ADM6996L-AA-T-1
Description
Manufacturer
Lantiq
Datasheet

Specifications of ADM6996L-AA-T-1

Lead Free Status / RoHS Status
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Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADM6996L-AA-T-1
Manufacturer:
INTEL
Quantity:
35
Figure 4
Preamble: At least 32 continuous 1
Start: 01
Opcode: 10
Table select: 1
Register Address: Read Target register address. (7 bits)
TA: Turn Around.
Register Data: 32 bit data.
Counter output bit sequence is bit 31 to bit 0.
If a user reads the EEPROM then 32 bits of data will separate as two EEPROM registers. The sequence is:
1. Register +1, Register (Register is even number)
2. Register, Register-1(Register is Odd number)
Example:
Read Register 00
Read Register 03
Idle: EESK must send at least one clock pulse at idle time
ADM6996L/LX issue Reset internal counter command
EESK: Similar to the MDC signal
EDI: Similar to the MDIO signal
ECS: Must keep low.
Figure 5
Data Sheet
B
(2 bits)
B
ADM6996L/LX Serial Chip’s Internal Counter or EEPROM Access Timing
ADM6996L/LX Issue Reset Internal Counter Command
(2 bits, Only supports a read command)
B
= Counter, 0
H
H
then the ADM6996L/LX will drive 01
then ADM6996L/LX will drive 03
B
= EEPROM (1 bit)
B
’s
H
& 02
55
H
& 00
H
H
Registers DescriptionSerial Interface Timing
Rev. 1.13, 2005-11-22
ADM6996L/LX
Data Sheet

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