HBLXT9785HE Cortina Systems Inc, HBLXT9785HE Datasheet - Page 196

• Manufacturer Part Number: HBLXT9785HE
• Manufacturer: Cortina Systems Inc

Specifications of HBLXT9785HE

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 88
Table 89
Cortina Systems
Auto-Negotiation Advertisement Register (Address 4)
Auto-Negotiation Link Partner Base Page Ability Register (Address 5)
®
1. R/W = Read/Write, R = Read Only
2. LSHR = Default value is derived from a single device input pin state or a group of device input pin states as
3. The default setting of Register bit 4.10 is determined by the PAUSE pin. The BGA15 package does not
4. Default settings for bits 4.5:8 are determined by CFG pins as described in
5. Pause operation is only valid for full-duplex modes.
6. If Register bit 4.13 is set to advertise a fault, Register bit 1.4 will be set. Register bit 4.13 is set or cleared
Note:
1. R = Read Only
2. Default value at the start of auto-negotiation code word transmission.
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Bit
Bit
4:0
15
14
13
12
11
9
8
7
6
5
the pin(s) are latched at startup or hardware reset.
have a Pause hardware configuration pin and has a default of 0.
Configuration Settings , on page
only through the MDC/MDIO interface and is not cleared upon completion of auto-negotiation.
Restart the auto-negotiation process whenever Register 4 is written/modified.
Name
Next Page
Acknowledge
Remote Fault
Reserved
Asymmetric
Pause
Name
100BASE-TX
100BASE-TX
100BASE-T4
Half-Duplex
Half-Duplex
Full-Duplex
Full-Duplex
10BASE-T
10BASE-T
Selector
S<4:0>
Field,
Description
0 = 100BASE-T4 capability is not available
1 = 100BASE-T4 capability is available
(The LXT9785/LXT9785E does not support 100BASE-T4 but
allows this bit to be set to advertise in the auto-negotiation
sequence for 100BASE-T4 operation. An external
100BASE-T4 transceiver could be switched in if this
capability is desired.)
0 = Port is not 100BASE-TX full-duplex capable.
1 = Port is 100BASE-TX full-duplex capable
0 = Port is not 100BASE-TX half-duplex capable
1 = Port is 100BASE-TX half-duplex capable
0 = Port is not 10BASE-T full-duplex capable
1 = Port is 10BASE-T full-duplex capable
0 = Port is not 10BASE-T half-duplex capable
1 = Port is 10BASE-T half-duplex capable
<00001> = IEEE 802.3
<00010> = IEEE 802.9 ISLAN-16T
<00000> = Reserved for future auto-negotiation development
<11111> = Reserved for future auto-negotiation development
Unspecified or reserved combinations should not be
transmitted
Description
0 = Link partner has no ability to send multiple pages
1 = Link partner has ability to send multiple pages
0 = Link partner has not received Link Code Word from the
1 = Link partner has received Link Code Word from the
0 = No remote fault
1 = Remote fault
Write as 0, ignore on Read
Pause operation defined in Clause 40 and 27
0 = Link partner is not Pause capable
1 = Link partner can only send Pause
the LXT9785/LXT9785E
LXT9785/LXT9785E.
126.
Table 42, Global Hardware
7.0 Register Definitions
Type
R/W
R/W
R/W
R/W
R/W
R/W
Type
R
R
R
R
R
1
1
Page 196
Default
LSHR
LSHR
LSHR
LSHR
Default
00001
0
0
0
0
0
0
2,4
2,4
2,4
2,4
2