HBLXT9785HE Cortina Systems Inc, HBLXT9785HE Datasheet - Page 208

• Manufacturer Part Number: HBLXT9785HE
• Manufacturer: Cortina Systems Inc

Specifications of HBLXT9785HE

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 100
Cortina Systems
Trim Enable Register (Address 27, Hex 1B)
®
1. LSHR = Default value is derived from a single device input pin state or a group of device input pin states as
2. Default values for Register bits 27.11:10 are determined by the TxSLEW pins.
3. Default value for Register bit 27.9 is determined by the AMDIX_EN pin.
4. Default value for Register bit 27.8 is determined by the MDIX pin. BGA15 does not support the MDIX
5. R/W = Read/Write, R = Read Only, LH = Latching High – cleared when read.
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Bit
1:0
3
2
the pin(s) are latched at startup or hardware reset.
hardware configuration. The BGA15 default = 0.
Name
SLP_Det
LFIT
Expired
Reserved
Description
Standard Link Partner Detected.
0 = Standard link partner not discovered; process may not be
1 = Standard link partner discovered; indication not to turn on
Note: This bit is only valid while link is down.
Link Fail Inhibit Timer expiration indicator. Valid only
when SLP_Det = 1.
0 = Link Fail Inhibit Timer has not expired or standard link
1 = Link Fail Inhibit Timer expired with a standard link partner
Write as 0, ignore on Read.
complete.
power over the cable.
partner not discovered
detected since last register read or link establishment
7.0 Register Definitions
Type
R, LH
R, LH
R
5
Page 208
Default
00
0
0