ICS1892Y IDT, Integrated Device Technology Inc, ICS1892Y Datasheet - Page 107

• Manufacturer Part Number: ICS1892Y
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS1892Y

• Lead Free Status / RoHS Status: Not Compliant

ICS1892, Rev. D, 2/26/01
Table 9-5. Configuration Pins (Continued)
DPXSEL
HW/SW
LOCK
LSTA
MII/SI
NOD/REP
Name
ICS1892
Pin
Number
Pin
23
27
21
19
24
1
Input or
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Output
Output
Output
Type
Input
Input
Input
Pin
Half-Duplex / Full-Duplex Select.
The ‘Pin Type’ for this pin depends on the setting for the HW/SW pin
(pin 23). When the HW/SW pin is set for:
Hardware/Software (Select).
When the signal on this pin is logic:
(Stream Cipher) Lock (Acquired).
When the signal on this pin is logic:
Link Status.
This pin is used to report the status of the link segment. When the
signal on this pin is logic:
This pin is mapped according to the interface for which the ICS1892 is
mapped. For the:
Media Independent Interface / Stream Interface (Select).
This pin is used in combination with the 10/LP and 10/100SEL pins to
configure the ICS1892 MAC/Repeater Interface. When the signal on
this pin is logic:
Node/Repeater (Select).
This selection on this pin affects both the SQE test and the Carrier
Sense (CSR) signal. When the signal on this pin is logic:
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Hardware mode, this pin acts as an input. In this case, when the
signal on this pin is logic:
– Low, this pin selects half-duplex operations.
– High, this pin selects full-duplex operations.
Software mode, this pin acts as an output that indicates the current
status of this pin. In this case, when the signal on this pin is logic:
– Low, this pin indicates that it is set for half-duplex operations.
– High, this pin indicates that it is set for full-duplex operations.
Low, this pin selects Hardware mode operations.
High, this pin selects Software mode operations.
Low, the ICS1892 does not have a lock on the data stream.
High, the 1892 has a lock on the data stream.
Low, there is no link established.
High, there is a link established.
Media Independent Interface (MII), the LSTA is mapped as LSTA.
100M Symbol Interface, the LSTA is mapped as SD.
10M Serial Interface, the LSTA is mapped as LSTA.
Link Pulse Interface, the LSTA is mapped as SD.
Low, this pin configures the MAC/Repeater Interface as a Media
Independent Interface.
High, this pin configures the MAC/Repeater Interface as a Stream
Interface.
Low, this pin enables the ICS1892 to default to node operations.
High, this pin enables the ICS1892 to default to repeater
operations.
107
Chapter 9 Pin Diagram, Listings, and Descriptions
Pin Description
February 26, 2001