MC33989PEG Freescale Semiconductor, MC33989PEG Datasheet - Page 19

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MC33989PEG

Manufacturer Part Number
MC33989PEG
Description
SBC-HS
Manufacturer
Freescale Semiconductor
Datasheet

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CAN HIGH AND CAN LOW OUTPUTS (CANH AND CANL)
of CANH and CANL is reported through RX output. A 60 Ω termination resistor is connected between CANH and CANL pins.
SYSTEM CLOCK (SCLK)
MASTER IN SLAVE OUT (MISO)
the MISO pin.
MASTER OUT SLAVE IN (MOSI)
this pin.
CHIP SELECT (CS)
WATCHDOG (WD)
Analog Integrated Circuit Device Data
Freescale Semiconductor
The CAN High and CAN Low pins are the interfaces to the CAN bus lines. They are controlled by TX input level, and the state
SCLK is the System Clock input pin of the serial peripheral interface.
MISO is the Master In Slave Out pin of the serial peripheral interface. Data is sent from the SBC to the microcontroller through
MOSI is the Master Out Slave In pin of the serial peripheral interface. Control data from a microcontroller is received through
CS is the Chip Select pin of the serial peripheral interface. When this pin is LOW, the SPI port of the device is selected.
The Watchdog output pin is asserted LOW to flag that the software watchdog has not been properly triggered.
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL DESCRIPTION
33989
19

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