MC33989PEG Freescale Semiconductor, MC33989PEG Datasheet - Page 37

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MC33989PEG

Manufacturer Part Number
MC33989PEG
Description
SBC-HS
Manufacturer
Freescale Semiconductor
Datasheet

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Table 27. TIM1 Control Bits
Low Power Mode Control Register (LPC)
• The state of HS1 in Stop and Sleep mode (HS1 permanently off or HS1 cyclic)
• Enable or disable the forced wake-up function (SBC automatic wake-up after time spend in Sleep or Stop modes, time is
• Enable or disable the sense of the wake-up inputs (Lx) at sampling point of the Cyclic Sense period (LX2HS1 bit).
Table 28. LPC Register
wake-up operation.
Analog Integrated Circuit Device Data
Freescale Semiconductor
This register controls:
defined by the TIM2 register)
Refer to the Cyclic Sense Wake-up discussion for details of the LPC register setup required for proper Cyclic Sense or direct
Reset Condition
Reset Value
1
1
$110B
LPC
1
1
W
R
Table 30. HS1AUTO Control Bits
Table 29. LX2HS1 Control Bits
Sample
Figure 19. HS1 Operation when Cyclic Sense is Selected
0
1
HS1AUTO
HS1
LX2HS1
N2R,STB2RSTO2R
0
1
0
1
POR, NR2R
LX2HS1
D3
Cyclic Sense Timing, Off Time
0
HS1 OFF
ON, HS1 Cyclic, Period Defined in TIM2 Register
Auto Timing HS1 in Sleep and Stop Modes
Yes, Lx Inputs Sensed at Sampling Point
Wake-up Inputs Supplied by HS1
200
400
N2R,STB2RSTO2R
POR, NR2R
Cyclic Sense on Time
FWU
D2
OFF
0
No
HS1 ON
Lx Sampling Point
10 µs
Cyclic Sense/FWU Timing 7
Cyclic Sense/FWU Timing 8
D1
LOGIC COMMANDS AND REGISTERS
t
FUNCTIONAL DEVICE OPERATION
N2R,STB2RSTO2R
POR, NR2R
HS1AUTO
D0
0
33989
37

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