PIC16F721-E/SO Microchip Technology, PIC16F721-E/SO Datasheet - Page 170

• Manufacturer Part Number: PIC16F721-E/SO
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF720/721
19.2
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
and interrupt flag bit set, one of the following will occur:
• If the interrupt occurs before the execution of a
• If the interrupt occurs during or after the
FIGURE 19-1:
TABLE 19-1:
DS41430A-page 170
Name
IOCB
INTCON
PIE1
PIR1
Legend:
Instruction Flow
(INTCON reg.)
SLEEP instruction, the SLEEP instruction will
complete as a NOP. Therefore, the WDT and WDT
prescaler and postscaler (if enabled) will not be
cleared, the TO bit will not be set and the PD bit
will not be cleared.
execution of a SLEEP instruction, the device will
immediately wake-up from Sleep. The SLEEP
instruction will be completely executed before the
wake-up. Therefore, the WDT and WDT prescaler
and postscaler (if enabled) will be cleared, the TO
bit will be set and the PD bit will be cleared.
(INTCON reg.)
Note
INTF flag
GIE bit
Instruction
Fetched
Instruction
Executed
CLKOUT
Oscillator
INT pin
1:
2:
3:
Wake-up Using Interrupts
PC
(3)
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used in Power-Down mode.
TMR1GIE
TMR1GIF
T
GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = 0, execution will continue in-line.
CLKOUT is not available in EC Oscillator mode, but shown here for timing reference.
OST
IOCB7
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
Bit 7
GIE
Inst(PC - 1)
= 1024 T
SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
PC
WAKE-UP FROM SLEEP THROUGH INTERRUPT
OSC
IOCB6
ADIE
Bit 6
PEIE
ADIF
(drawing not to scale). This delay does not apply to EC mode.
Inst(PC + 1)
Sleep
PC + 1
TMR0IE
IOCB5
RCIE
RCIF
Bit 5
Processor in
IOCB4
INTE
Bit 4
TXIE
TXIF
Sleep
PC + 2
T
RABIE
SSPIE
SSPIF
OST (1)
Bit 3
—
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
CCP1IE
Inst(PC + 2)
Inst(PC + 1)
TMR0IF
CCP1IF
Bit 2
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
To ensure that the WDT is cleared, a CLRWDT instruction
should be executed before a SLEEP instruction.
—
PC + 2
TMR2IE
TMR2IF
INTF
Bit 1
—
(2)
Dummy Cycle
PC + 2
TMR1IE
TMR1IF
RABIF
Bit 0
—
 2010 Microchip Technology Inc.
Dummy Cycle
Inst(0004h)
0000 ----
0000 000x
0000 0000
0000 0000
POR, BOR
0004h
Value on
Inst(0005h)
Inst(0004h)
other Resets
0005h
Value on all
0000 ----
0000 000x
0000 0000
0000 0000