PIC18F23K20-E/SS Microchip Technology, PIC18F23K20-E/SS Datasheet - Page 148
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PIC18F23K20-E/SS
Manufacturer Part Number
PIC18F23K20-E/SS
Description
8 KB Enh Flash, 768 RAM, 25 I/O Pb Free, Nanowatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F23K20-ISS.pdf
(10 pages)
Specifications of PIC18F23K20-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 148 of 456
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PIC18F2XK20/4XK20
TABLE 11-3:
DS41303G-page 148
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.
Note 1:
Name
Not impemented on PIC18F2XK20 devices.
PORTB Data Direction Control Register
PORTC Data Direction Control Register
Timer1 Register, Low Byte
Timer1 Register, High Byte
Timer3 Register, High Byte
Timer3 Register, Low Byte
Capture/Compare/PWM Register 1, Low Byte
Capture/Compare/PWM Register 1, High Byte
Capture/Compare/PWM Register 2, Low Byte
Capture/Compare/PWM Register 2, High Byte
GIE/GIEH PEIE/GIEL TMR0IE
PSPIE
PSPIP
PSPIF
OSCFIF
OSCFIE
OSCFIP
RD16
RD16
P1M1
IPEN
Bit 7
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
—
(1)
(1)
(1)
SBOREN
T3CCP2 T3CKPS1 T3CKPS0 T3CCP1
T1RUN
P1M0
ADIE
ADIP
ADIF
C1IE
C1IP
Bit 6
C1IF
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
DC1B1
DC2B1
RCIE
RCIP
RCIF
Bit 5
C2IF
C2IE
C2IP
—
DC1B0
DC2B0
INT0IE
TXIE
TXIP
EEIF
EEIE
EEIP
Bit 4
TXIF
RI
CCP1M3
CCP2M3
SSPIE
SSPIP
SSPIF
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
TO
CCP1M2 CCP1M1 CCP1M0
CCP2M2 CCP2M1 CCP2M0
T3SYNC
TMR0IF
CCP1IF
CCP1IE
CCP1IP
HLVDIE
HLVDIP
HLVDIF
Bit 2
PD
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
INT0IF
2010 Microchip Technology Inc.
Bit 1
POR
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
RBIF
Bit 0
BOR
on page
Values
Reset
59
58
62
62
62
62
62
62
62
62
60
60
60
61
61
61
61
61
61
61
61
61
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