PIC18F23K20-E/SS Microchip Technology, PIC18F23K20-E/SS Datasheet - Page 308
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PIC18F23K20-E/SS
Manufacturer Part Number
PIC18F23K20-E/SS
Description
8 KB Enh Flash, 768 RAM, 25 I/O Pb Free, Nanowatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F23K20-ISS.pdf
(10 pages)
Specifications of PIC18F23K20-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F2XK20/4XK20
23.2
For PIC18F2XK20/4XK20 devices, the WDT is driven
by the LFINTOSC source. When the WDT is enabled,
the clock source is also enabled. The nominal WDT
period is 4 ms and has the same stability as the LFIN-
TOSC oscillator.
The 4 ms period of the WDT is multiplied by a 16-bit
postscaler. Any output of the WDT postscaler is
selected by a multiplexer, controlled by bits in Configu-
ration Register 2H. Available periods range from 4 ms
to 131.072 seconds (2.18 minutes). The WDT and
postscaler are cleared when any of the following events
occur: a SLEEP or CLRWDT instruction is executed, the
IRCF bits of the OSCCON register are changed or a
clock failure has occurred.
FIGURE 23-1:
DS41303G-page 308
Change on IRCF bits
Note 1: The CLRWDT and SLEEP instructions
All Device Resets
LFINTOSC Source
2: Changing the setting of the IRCF bits of
3: When a CLRWDT instruction is executed,
WDTPS<3:0>
Watchdog Timer (WDT)
clear the WDT and postscaler counts
when executed.
the OSCCON register clears the WDT
and postscaler counts.
the postscaler count will be cleared.
SWDTEN
CLRWDT
WDTEN
Sleep
WDT BLOCK DIAGRAM
Enable WDT
WDT Counter
128
4
Programmable Postscaler
1:1 to 1:32,768
Reset
2010 Microchip Technology Inc.
WDT
Reset
Wake-up
from Power
Managed Modes
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