PIC24FJ16MC102-I/SO Microchip Technology, PIC24FJ16MC102-I/SO Datasheet - Page 165
![16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SOIC .300in TUBE](/photos/16/13/161315/soic28_sml.jpg)
PIC24FJ16MC102-I/SO
Manufacturer Part Number
PIC24FJ16MC102-I/SO
Description
16-bit Motor Control Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet
1.PIC24FJ16MC101-IP.pdf
(304 pages)
Specifications of PIC24FJ16MC102-I/SO
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-28
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Featured Product
PIC24FJ/33FJ MCUs & dsPIC® DSCs
Core Processor
PIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
- Current page: 165 of 304
- Download datasheet (5Mb)
REGISTER 17-3:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
AMSK7
R/W-0
U-0
—
Unimplemented: Read as ‘0’
AMSKx: Mask for Address bit x Select bit
1 = Enable masking for bit x of incoming message address; bit match not required in this position
0 = Disable masking for bit x; bit match required in this position
AMSK6
R/W-0
U-0
—
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
W = Writable bit
‘1’ = Bit is set
AMSK5
R/W-0
U-0
—
AMSK4
R/W-0
U-0
—
Preliminary
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
AMSK3
R/W-0
U-0
—
PIC24FJ16MC101/102
AMSK2
R/W-0
U-0
—
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
DS39997B-page 165
AMSK8
AMSK0
R/W-0
R/W-0
bit 8
bit 0
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