PIC24FJ64GA002T-I/SO Microchip Technology, PIC24FJ64GA002T-I/SO Datasheet - Page 32

• Manufacturer Part Number: PIC24FJ64GA002T-I/SO
• Description: 64KB, Flash, 8192bytes-RAM, 16MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA002T-I/SO

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC24FJ64GA002T-I/SOTR

PIC24FJXXXGA0XX
4.6.2
Configuration bits may be programmed a single byte at
a time using the PROGW command. This command
specifies the configuration data and Configuration
register
programmed, any unimplemented or reserved bits
must be programmed with a ‘1’.
Two PROGW commands are required to program the
Configuration bits. A flowchart for Configuration bit
programming is shown in Figure 4-5.
4.6.3
After the Configuration bits are programmed, the
contents of memory should be verified to ensure that
the programming was successful. Verification requires
the Configuration bits to be read back and compared
against the copy held in the programmer’s buffer. The
READP command reads back the programmed
Configuration bits and verifies that the programming
was successful.
DS39768D-page 32
Note:
address.
PROGRAMMING METHODOLOGY
If the General Segment Code-Protect bit
(GCP) is programmed to ‘0’, code memory
is code-protected and can not be read.
Code memory must be verified before
enabling read protection. See Section 4.6.4
“Code-Protect Configuration Bits” for
more
Configuration bits.
PROGRAMMING VERIFICATION
information
When
Configuration
about
code-protect
bits
are
prevents code memory from being read (read protection).
4.6.4
CW1 Configuration register controls code protection for
the PIC24FJXXXGA0XX family. Two forms of code pro-
tection are provided. One form prevents code memory
from being written (write protection) and the other
GWRP (CW1<12>) controls write protection and GCP
(CW1<13>) controls read protection. Protection is
enabled when the respective bit is ‘0’.
Erasing sets GWRP and GCP to ‘1’, which allows the
device to be programmed.
When write protection is enabled (GWRP = 0), any
programming operation to code memory will fail.
When read protection is enabled (GCP = 0), any read
from code memory will cause a 0h to be read, regard-
less of the actual contents of code memory. Since the
programming executive always verifies what it
programs, attempting to program code memory with
read protection enabled also will result in failure.
It is imperative that both GWRP and GCP are ‘1’ while
the device is being programmed and verified. Only after
the device is programmed and verified should either
GWRP or GCP be programmed to ‘0’ (see Section 4.6
“Configuration Bits Programming”).
Note:
CODE-PROTECT
CONFIGURATION BITS
Bulk Erasing in ICSP mode is the only way
to reprogram code-protect bits from an ON
state (‘0’) to an Off state (‘1’).
© 2008 Microchip Technology Inc.