PIC24FJ64GA002T-I/SO Microchip Technology, PIC24FJ64GA002T-I/SO Datasheet - Page 48

• Manufacturer Part Number: PIC24FJ64GA002T-I/SO
• Description: 64KB, Flash, 8192bytes-RAM, 16MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA002T-I/SO

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC24FJ64GA002T-I/SOTR

PIC24FJXXXGA0XX
TABLE 6-4:
DS39768D-page 48
PIC24FJ128GAGA006
PIC24FJ128GAGA008
PIC24FJ128GAGA010
Legend:
Note:
Device
Item
SUM[a:b]
CFGB
CW1 address is last location of implemented program memory; CW2 is (last location – 2).
CHECKSUM COMPUTATION (CONTINUED)
=
=
Description
Byte sum of locations, a to b inclusive (all 3 bytes of code memory)
Configuration Block (masked),
64/80/100-Pin Devices = Byte sum of (CW1 & 0x7DDF + CW2 & 0x87E3)
28/44-Pin Devices = Byte sum of (CW1 & 0x7FDF + CW2 & 0xFFF7)
Read Code
Protection
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
CFGB + SUM(0:0157FB)
0
CFGB + SUM(0:0157FB)
0
CFGB + SUM(0:0157FB)
0
Checksum Computation
Checksum
0xF8CC
0xF8CC
0xF8CC
Erased
0x0000
0x0000
0x0000
Value
© 2008 Microchip Technology Inc.
0xAAAAAA at 0x0 and Last
Checksum with
Code Address
0xF6CE
0xF6CE
0xF6CE
0x0000
0x0000
0x0000