PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 200

no-image

PIC24FJ64GA306-I/MR

Manufacturer Part Number
PIC24FJ64GA306-I/MR
Description
16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
Manufacturer
Microchip Technology
Datasheet
PIC24FJ128GA310 FAMILY
FIGURE 13-1:
DS39996F-page 200
Set T3IF (T5IF)
Note 1:
A/D Event Trigger
(T4CK)
2:
3:
T2CK
The 32-Bit Timer Configuration bit, T32, must be set for 32-bit timer/counter operation. All control bits are
respective to the T2CON and T4CON registers.
The timer clock input must be assigned to an available RPn/RPIn pin before use. See
Pin Select (PPS)”
The A/D event trigger is available only on Timer 2/3 in 32-bit mode and Timer 3 in 16-bit mode.
Data Bus<15:0>
Read TMR2 (TMR4)
Write TMR2 (TMR4)
TIMER2/3 AND TIMER4/5 (32-BIT) BLOCK DIAGRAM
TGATE
1
0
(3)
Reset
for more information.
Equal
MSB
(1)
(1)
16
(TMR5HLD)
TMR3HLD
(TMR5)
TMR3
(PR5)
PR3
16
Comparator
Q
Q
Gate
Sync
T
CY
CK
16
(TMR4)
TMR2
(PR4)
D
PR2
LSB
1x
01
00
 2010-2011 Microchip Technology Inc.
TON
Sync
TGATE
TCS
Section 11.4 “Peripheral
(2)
(2)
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2

Related parts for PIC24FJ64GA306-I/MR