PIC32MX110F016B-I/SS Microchip Technology, PIC32MX110F016B-I/SS Datasheet - Page 70

With the exception of those noted, all registers in this table (except as noted) have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC respectively. See

Section 11.2 “CLR, SET and INV Registers”

This register does not have associated SET and INV registers.

This register does not have associated CLR, SET and INV registers.

Reset value for this bit is undefined.

(2)

(3)

(2)

(3)

31:16

USB REGISTER MAP

15:0

31/15

—

30/14

—

29/13

—

(1)

for more information.

28/12

—

27/11

—

26/10

—

25/9

—

24/8

—

UACTPND

DPPULUP DMPULUP DPPULDWN DMPULDWN VBUSON

LSPDEN

STALLIF

STALLIE

JSTATE

BTSEF

BTSEE

23/7

IDIF

IDIE

—

Bits

(4)

T1MSECIE LSTATEIE

T1MSECIF LSTATEIF

ATTACHIF RESUMEIF

ATTACHIE RESUMEIE

BMXEF

BMXEE

22/6

SE0

—

ENDPT<3:0>

TOKBUSY

LSTATE

DMAEE

PKTDIS

DMAEF

21/5

—

BDTPTRL<7:1>

USLPGRD USBBUSY

USBRST

ACTVIF

ACTVIE

BTOEF

BTOEE

IDLEIF

IDLEIE

20/4

—

DEVADDR<6:0>

SESVDIE SESENDIE

SESVDIF SESENDIF

HOSTEN RESUME

DFN8EF CRC16EF

DFN8EE CRC16EE

SESVD

TRNIE

TRNIF

19/3

DIR

—

SESEND

OTGEN

SOFIF

SOFIE

PPBI

18/2

—

USUSPEND USBPWR 0000

VBUSCHG

CRC5EF

CRC5EE

PPBRST

UERRIF

UERRIE

EOFEF

EOFEE

17/1

—

VBUSVDIE 0000

VBUSVDIF 0000

DETACHIF 0000

DETACHIE 0000

VBUSDIS 0000

VBUSVD

URSTIE

URSTIF

USBEN

SOFEN

PIDEE

PIDEF

16/0

—

0000

PIC32MX110F016B-I/SS Microchip Technology, PIC32MX110F016B-I/SS Datasheet - Page 70

PIC32MX110F016B-I/SS

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