PIC32MX110F016B-I/SS Microchip Technology, PIC32MX110F016B-I/SS Datasheet - Page 81

no-image

PIC32MX110F016B-I/SS

Manufacturer Part Number
PIC32MX110F016B-I/SS
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, CTMU, 4 DMA 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Datasheet
REGISTER 5-2:
REGISTER 5-3:
© 2011 Microchip Technology Inc.
Legend:
R = Readable bit
-n = Value at POR
bit 31-0
Note 1:
Legend:
R = Readable bit
-n = Value at POR
bit 31-0
Range
Range
31:24
23:16
31:24
23:16
15:8
15:8
Bit
7:0
Bit
7:0
NVMKEY<31:0>: Unlock Register bits
These bits are write-only, and read as ‘0’ on any read
NVMADDR<31:0>: Flash Address bits
Bulk/Chip/PFM Erase: Address is ignored.
Page Erase: Address identifies the page to erase.
Row Program: Address identifies the row to program.
Word Program: Address identifies the word to program.
This register is used as part of the unlock sequence to prevent inadvertent writes to the PFM.
31/23/15/7
31/23/15/7
R/W-0
R/W-0
R/W-0
R/W-0
Bit
W-0
W-0
W-0
W-0
Bit
NVMKEY: PROGRAMMING UNLOCK REGISTER
NVMADDR: FLASH ADDRESS REGISTER
30/22/14/6
30/22/14/6
R/W-0
R/W-0
R/W-0
R/W-0
W-0
W-0
W-0
W-0
Bit
Bit
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
29/21/13/5
29/21/13/5
R/W-0
R/W-0
R/W-0
R/W-0
Bit
W-0
W-0
W-0
W-0
Bit
Preliminary
28/20/12/4
28/20/12/4
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<31:24>
NVMADDR<23:16>
NVMADDR<15:8>
W-0
W-0
W-0
W-0
Bit
NVMKEY<31:24>
NVMKEY<23:16>
Bit
NVMADDR<7:0>
NVMKEY<15:8>
NVMKEY<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
27/19/11/3
R/W-0
R/W-0
R/W-0
R/W-0
Bit
W-0
W-0
W-0
W-0
Bit
PIC32MX1XX/2XX
26/18/10/2
26/18/10/2
(1)
R/W-0
R/W-0
R/W-0
R/W-0
Bit
W-0
W-0
W-0
W-0
Bit
x = Bit is unknown
x = Bit is unknown
25/17/9/1
25/17/9/1
R/W-0
R/W-0
R/W-0
R/W-0
W-0
W-0
W-0
W-0
Bit
Bit
DS61168C-page 81
24/16/8/0
24/16/8/0
R/W-0
R/W-0
R/W-0
R/W-0
W-0
W-0
W-0
W-0
Bit
Bit

Related parts for PIC32MX110F016B-I/SS