SC16C654DBIB64,518 NXP Semiconductors, SC16C654DBIB64,518 Datasheet - Page 16

• Manufacturer Part Number: SC16C654DBIB64,518
• Manufacturer: NXP Semiconductors

Specifications of SC16C654DBIB64,518

• Transmit Fifo: 64Byte
• Receive Fifo: 64Byte
• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Package Type: LQFP
• Operating Supply Voltage (max): 5.5V
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14965
Product data sheet
6.1.1 The 16 mode interface
6.1.2 The 68 mode interface
6.1 Interface options
Two user interface modes are selectable for the PLCC68 package. These interface modes
are designated as the ‘16 mode’ and the ‘68 mode’. This nomenclature corresponds to the
early 16C454/554 and 68C454/554 package interfaces respectively.
The 16 mode configures the package interface pins for connection as a standard
16 series (Intel) device and operates similar to the standard CPU interface available on
the 16C454/554. In the 16 mode (pin 16/68 = logic 1), each UART is selected with
individual chip select (CSx) pins, as shown in
Table 3:
The 68 mode configures the package interface pins for connection with Motorola, and
other popular microprocessor bus types. The interface operates similar to the
68C454/554. In this mode, the SC16C654B/654DB decodes two additional addresses,
A3-A4, to select one of the four UART ports. The A[3:4] address decode function is used
only when in the 68 mode (16/68 = logic 0), and is shown in
Table 4:
CSA
1
0
1
1
1
CS
1
0
0
0
0
Serial port channel selection, 16 mode interface
Serial port channel selection, 68 mode interface
CSB
1
1
0
1
1
A4
n/a
0
0
1
1
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
Rev. 02 — 20 June 2005
CSC
1
1
1
0
1
A3
n/a
0
1
0
1
CSD
1
1
1
1
0
Table
UART channel
none
A
B
C
D
UART channel
none
A
B
C
D
SC16C654B/654DB
3.
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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