ISP1507EBSUM STEricsson, ISP1507EBSUM Datasheet - Page 32

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ISP1507EBSUM

Manufacturer Part Number
ISP1507EBSUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1507EBSUM

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 16.
[1]
CD00222691
Product data sheet
Parameter name
RXCMD delay (J and K)
RXCMD delay (SE0)
TX start delay
TX end delay (packets)
TX end delay (SOF)
RX start delay
RX end delay
Fig 12. Example of using the ISP1507 to transmit and receive USB data
DATA [ 3:0 ]
According to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6, the TX and RX start or end delays must be used
for high-speed inter-packet timing. If the link uses RXCMDs for high-speed inter-packet timing, the result cannot be guaranteed.
CLOCK
NXT
STP
DIR
PHY pipeline delays
9.8.1.1 ISP1507 pipeline delays
9.8.1 USB packet timing
[1]
9.8 USB packet transmit and receive
An example of a packet transmit and receive is shown in
packets, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.
The ISP1507 delays are shown in
Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.2.
link sends
TXCMD
TXCMD
High-speed PHY delay
4
4
1 to 2
3 to 4
6 to 9
5 to 6
5 to 6
ISP1507
TXCMD
accepts
the next data;
DATA
link sends
ISP1507
accepts
Rev. 04 — 20 May 2010
link signals
end of data
Table
Full-speed PHY delay
4
4 to 6
6 to 10
not applicable
not applicable
not applicable
17 to 18
ULPI bus
16. For a detailed description, refer to UTMI+
is idle
ISP1507E; ISP1507F
turnaround
asserts DIR,
turnaround
ISP1507
causing
cycle
RXCMD
ULPI HS USB OTG transceiver
Figure
(NXT LOW)
ISP1507
RXCMD
sends
Low-speed PHY delay
4
16 to 18
74 to 75
not applicable
not applicable
not applicable
122 to 123
12. For details on USB
DATA
(NXT HIGH)
USB data
ISP1507
© ST-ERICSSON 2010. All rights reserved.
sends
turnaround
DIR, causing
turnaround
deasserts
ISP1507
cycle
004aab080
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