ADV7190KST Analog Devices Inc, ADV7190KST Datasheet - Page 25

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ADV7190KST

Manufacturer Part Number
ADV7190KST
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7190KST

Number Of Dac's
6
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LQFP
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

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Mode 2: Master Option HSYNC, VSYNC, BLANK
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode the ADV7190/ADV7191 can generate Horizontal and Vertical SYNC signals. A coincident low transition of both
HSYNC and VSYNC inputs indicates the start of an Odd Field. A VSYNC low transition when HSYNC is high indicates the
start of an Even Field. The BLANK signal is optional. When the BLANK input is disabled the ADV7190/ADV7191 automatically blanks
all normally blank lines as per CCIR-624. Mode 2 is illustrated in Figure 40 (NTSC) and Figure 41 (PAL). Figure 42 illustrates
the HSYNC, BLANK and VSYNC for an even-to-odd field transition relative to the pixel data. Figure 43 illustrates the HSYNC,
BLANK and VSYNC for an odd-to-even field transition relative to the pixel data.
REV. B
VSYNC
HSYNC
HSYNC
VSYNC
BLANK
BLANK
622
HSYNC
BLANK
309
VSYNC
PIXEL
DATA
HSYNC
BLANK
VSYNC
DISPLAY
DISPLAY
PIXEL
DATA
623
310
Figure 42. Timing Mode 2, Even-to-Odd Field Transition Master/Slave
Figure 43. Timing Mode 2, Odd-to-Even Field Transition Master/Slave
624
311
PAL = 12
NTSC = 16
PAL = 12
NTSC = 16
EVEN FIELD
ODD FIELD
625
312
CLOCK/2
CLOCK/2
CLOCK/2
CLOCK/2
313
1
Figure 41. Timing Mode 2, PAL
314
PAL = 132
NTSC = 122
2
315
3
ODD FIELD
CLOCK/2
CLOCK/2
VERTICAL BLANK
VERTICAL BLANK
EVEN FIELD
316
–25–
4
PAL = 132
NTSC = 122
PAL = 864
NTSC = 858
317
5
Cb
CLOCK/2
CLOCK/2
318
CLOCK/2
6
CLOCK/2
Y
319
Cr
7
Y
320
Cb
Cb
21
ADV7190/ADV7191
Y
334
22
Cr
DISPLAY
335
23
Y
DISPLAY
336

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