ADV7190KST Analog Devices Inc, ADV7190KST Datasheet - Page 33

• Manufacturer Part Number: ADV7190KST
• Manufacturer: Analog Devices Inc

Specifications of ADV7190KST

• Number Of Dac's: 6
• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Not Compliant

MODE REGISTER 6
MR6 (MR67–MR60)
(ADDRESS (SR4–SR0) = 06H)
Mode Register 6 is an 8-bit-wide register. Figure 56 shows the
various operations under the control of Mode Register 6.
MR6 BIT DESCRIPTION
Power-Up Sleep Mode Control (MR60)
After RESET is applied this control is enabled (MR60 = 0) if
both SCRESET/RTC/TR and NTSC_PAL pins are tied high.
The ADV7190/ADV7191 will then power up in Sleep Mode to
facilitate low power consumption while the I
When this control is disabled (MR60 = 1, via the I
Mode control passes to Sleep Mode Control, MR27.
PPL Enable Control (MR61)
The PLL control should be enabled (MR61 = 0 ) when 4¥
Oversampling is enabled (MR16 = 1). It is also used to reset the
PLL when this bit is toggled.
Reserved (MR62, MR63, MR64)
A Logic 0 must be written to these bits.
Field Counter (MR65, MR66, MR67)
These three bits are read-only bits. The field count can be read
back over the I
from 0–3, in PAL Mode from 0–7.
MODE REGISTER 7
MR7 (MR77–MR70)
(Address (SR4–SR0) = 07H)
Mode Register 7 is an 8-bit-wide register. Figure 57 shows the
various operations under the control of Mode Register 7.
MR7 BIT DESCRIPTION
Color Control Enable (MR70)
This bit is used to enable control of contrast and saturation of
color. If this bit is set (1), color controls are enabled (Contrast
Control Register, U-Scale Register, V-Scale Register). If this bit
is set (0), the color control features are disabled.
REV. B
2
C interface. In NTSC mode the field count goes
MR77
CLAMP/ VSO SELECT
0
1
MR67 MR66 MR65
MR67
FIELD COUNTER
VSO OUTPUT
CLAMP OUTPUT
MR77
MR66
ZERO MUST
BE WRITTEN
TO THIS BIT
MR76
MR76
MR75
OUTPUT CONTROL
MR65
2
0
1
C is initialized.
Figure 56. Mode Register 6 (MR6)
Figure 57. Mode Register 7 (MR7)
CSO_HSO
HSO OUT
CSO OUT
MR75
2
C) Sleep
SHARPNESS FILTER
MR74
MR64 MR63 MR62
MR64
ZERO MUST
BE WRITTEN
TO THESE BITS
0
1
ENABLE
DISABLE
ENABLE
MR74
MR73
–33–
ENABLE CONTROL
MR63
0
1
BRIGHTNESS
Luma Saturation Control (MR71)
When this bit is set (1), the luma signal will be clipped if it reaches
a limit that corresponds to an input luma value of 255 (after
scaling by the Contrast Control Register). This prevents the
chrominance component of the composite video signal being
clipped if the amplitude of the luma is too high. When this bit is
set (0), this control is disabled.
Hue Adjust Control (MR72)
This bit is used to enable hue adjustment on the composite and
chroma output signals of the ADV7190/ADV7191. When this
bit is set (1), the hue of the color is adjusted by the phase offset
described in the Hue Adjust Control Register. When this bit is
set (0), hue adjustment is disabled.
Brightness Enable Control (MR73)
This bit is used to enable the brightness control of the ADV7190/
ADV7191. The actual brightness level is programmed in the
Brightness Control Register. This value or “setup” level is added to
the scaled Y data. When this bit is set (1), brightness control
is enabled. When this bit is set (0), brightness control is disabled.
Sharpness Filter Enable (MR74)
This bit is used to enable the sharpness control of the luminance
signal on the ADV7190/ADV7191 (Luma Filter Select has to
be set to Extended, i.e., MR04–MR02 = 100). The various
responses of the filter are determined by the Sharpness Con-
trol Register. When this bit is set (1), the luma response is altered
by the amount described in the Sharpness Control Register.
When this bit is set (0), the sharpness control is disabled. See
Internal Filter Response section for luma signal responses.
CSO_HSO Output Control (MR75)
This bit is used to determine whether HSO or CSO TTL output
signal is output at the CSO_HSO pin. If this bit is set (1), the
CSO TTL signal is output. If this bit is set 0, the HSO TTL signal
is output.
MR73
DISABLE
ENABLE
MR72
MR62
MR61
HUE ADJUST
0
1
0
1
CONTROL
PLL ENABLE
CONTROL
MR72
DISABLE
ENABLE
ENABLED
DISABLED
MR71
LUMA SATURATION
MR61
0
1
CONTROL
MR71
DISABLE
ENABLE
MR70
MR60
POWER-UP SLEEP
COLOR CONTROL
MR60
MODE CONTROL
0
1
0
1
ENABLE
ADV7190/ADV7191
DISABLE
ENABLE
MR70
ENABLED
DISABLED