SAA7104HV1 NXP Semiconductors, SAA7104HV1 Datasheet - Page 7

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SAA7104HV1

Manufacturer Part Number
SAA7104HV1
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7104HV1

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
64
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
Notes
1. Pin type: I = input, O = output, S = supply, pu = pull-up.
2. In accordance with the “IEEE1149.1” standard the pins TDI, TMS, TCK and TRST are input pins with an internal
3. The pins FSVGC, VSVGC, CBO, HSVGC and TTXRQ_XCLKO2 are used for bootstrapping; see Section 7.1.
4. For board design without boundary scan implementation connect TRST to ground.
5. This pin provides easy initialization of the Boundary Scan Test (BST) circuit. TRST can be used to force the Test
2004 Mar 04
SRES
VSM
HSM_CSYNC
RED_CR_C_CVBS
GREEN_VBS_CVBS
V
V
BLUE_CB_CVBS
RSET
DUMP
V
V
XTALO
XTALI
V
V
TVD
TRST
TDI
V
V
TTXRQ_XCLKO2
TTX_SRES
PD4
PD5
PD6
PD7
DDA1
DDA2
SSA1
SSA2
DDA3
DDA4
SSD4
DDD4
Digital video encoder
pull-up resistor and TDO is a 3-state output pin.
Access Port (TAP) controller to the TEST_LOGIC_RESET state (normal operation) at once.
SYMBOL
PIN TYPE
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I/pu
I/O
O
O
O
O
O
O
O
O
O
O
S
S
S
S
S
S
S
S
I
I
I
I
I
I
I
(1)
sync reset input
vertical synchronization output to monitor (non-interlaced auxiliary RGB)
horizontal synchronization output to monitor (non-interlaced auxiliary RGB) or
composite sync for RGB-SCART
analog output of RED or C
analog output of GREEN or VBS or CVBS signal
analog supply voltage 1 (3.3 V for DACs)
analog supply voltage 2 (3.3 V for DACs)
analog output of BLUE or C
DAC reference pin; connected via 1 k resistor to analog ground (do not use
capacitor in parallel with 1 k resistor)
DAC reference pin; connected via 12
analog ground 1
analog ground 2
crystal oscillator output
crystal oscillator input
analog supply voltage 3 (3.3 V for oscillator)
analog supply voltage 4 (3.3 V)
interrupt if TV is detected at DAC output
test reset input for BST; active LOW; notes 2, 4 and 5
test data input for BST; note 2
digital ground 4
digital supply voltage 4 (3.3 V for core)
teletext request output or 13.5 MHz clock output of the crystal oscillator; note 3
teletext input or sync reset input
MSB
MSB
MSB
MSB with C
3 with C
2 with C
1 with C
B
-Y-C
B
B
B
-Y-C
-Y-C
-Y-C
R
4 : 2 : 2; see Tables 8 to 13 for pin assignment
7
R
R
R
4 : 2 : 2; see Tables 8 to 13 for pin assignment
4 : 2 : 2; see Tables 8 to 13 for pin assignment
4 : 2 : 2; see Tables 8 to 13 for pin assignment
R
B
or C or CVBS signal
or CVBS signal
DESCRIPTION
resistor to analog ground
SAA7104H; SAA7105H
Product specification

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