SAA7154E/V2/G,518 NXP Semiconductors, SAA7154E/V2/G,518 Datasheet - Page 21

• Manufacturer Part Number: SAA7154E/V2/G,518
• Manufacturer: NXP Semiconductors

Specifications of SAA7154E/V2/G,518

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAA7154E_SAA7154H_2
Product data sheet
7.3 Component processing
7.4 Analog OSD processing
To avoid these undesired effects, the recognition of the vertical synchronization pulse has
been improved. A reference for the improved synchronization behavior is the selected
tape material.
The odd/even field detection has been made more robust. The detection signal is
low-pass filtered by a field-count programmable flywheel to exclude all noise peaks of
weak VCR signals.
RMS noise on sync pulse tips is measured and a status bit is set when the calculated
signal-to-noise ratio passes the 20 dB threshold.
The SAA7154E; SAA7154H supports Y-P
The SAA7154E; SAA7154H processes Y-P
representation, also known as 480p or 576p progressive video, at its natural pixel rate of
27 MHz. The SAA7154E; SAA7154H digitizes High Definition video (HD1), known as
1080i and 720p, at 54 MHz and samples it down to a pixel rate of 27 MHz. The
SAA7154E; SAA7154H detects HD0 and HD1 signals (separate for 480p, 576p, 1080i,
720p) and sets I
internal adjustments to support these standards.
HD0 signals can be output after the scaler (I-port) either at their natural resolution and
bandwidth, e.g. as in ITU-656 on 8 lines at 54 MHz clock rate or in SMPTE293M format
(16 lines (Y-C
meet the particular requirements of the following signal processing or display, e.g.
downscale to half the number of input lines. HD1 signals (720p, 1080i) can be output after
the scaler (I-port) with reduced horizontal resolution.
Fig 8. Functional overview of OSD
•
•
•
480i and 576i (standard definition and interlaced)
480p and 576p (HD0, double scan rate) at two-fold oversampling (54 MHz)
1080i and 720p (HD1), downsampled to 27 MHz pixel rate.
OSD_FSW
ADC OSD4
B
FSW
OSD
AI44
-C
2
C-bus status bits. The SAA7154E; SAA7154H performs all necessary
R
) and 24 lines (RGB) at 27 MHz clock rate. Or they can be scaled to
3-bit
FSW
Rev. 02 — 6 December 2007
ADC OSD1
AI22
3-bit
R_IN
COMPONENT OSD
ADC OSD2
AI32
G_IN
3-bit
Y
SAA7154E; SAA7154H
Multistandard video decoder with comb filter
B
-P
B
-P
R
R
or RGB component inputs according to:
ADC OSD3
component video input in double scan
AI42
SOFTMIXER OSD
3-bit
B_IN
UV
Y
from softmixer video decoder /
component video processing
UV
Y
© NXP B.V. 2007. All rights reserved.
001aab889
UV
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