IDT92HD90B0X5NLGXYAX8 IDT, Integrated Device Technology Inc, IDT92HD90B0X5NLGXYAX8 Datasheet - Page 66
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IDT92HD90B0X5NLGXYAX8
Manufacturer Part Number
IDT92HD90B0X5NLGXYAX8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT92HD90B0X5NLGXYAX8.pdf
(298 pages)
Specifications of IDT92HD90B0X5NLGXYAX8
Lead Free Status / RoHS Status
Compliant
- Current page: 66 of 298
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92HD90
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Rsvd
Data4
Data3
Data2
Data1
Data0
Field Name
Rsvd
Reg
Get
Set
7.4.12. AFG (NID = 01h): GPIOEn
Byte 4 (Bits 31:24)
Bits
31:5
Reserved.
4
Data for GPIO4. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
3
Data for GPIO3. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
2
Data for GPIO2. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
1
Data for GPIO1. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
0
Data for GPIO0. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
Bits
31:5
Reserved.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
R/W
R
F1600h
Default
00000000h
0h
0h
0h
0h
0h
Default
00000000h
66
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
Byte 1 (Bits 7:0)
716h
V 0.91 10/10
92HD90
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