MMA8453QR1 Freescale, MMA8453QR1 Datasheet - Page 18

• Manufacturer Part Number: MMA8453QR1
• Manufacturer: Freescale

Specifications of MMA8453QR1

• Lead Free Status / RoHS Status: Compliant

5.9
Transient, and Auto-SLEEP events. These six interrupt sources can be routed to one of two interrupt pins. The interrupt source
must be enabled and configured. If the event flag is asserted because the event condition is detected, the corresponding interrupt
pin, INT1 or INT2, will assert.
5.10
with a microcontroller. The MMA8453Q features an interrupt signal which indicates when a new set of measured acceleration
data is available thus simplifying data synchronization in the digital system that uses the device. The MMA8453Q may also be
configured to generate other interrupt signals accordingly to the programmable embedded functions of the device for Motion,
Freefall, Transient, Orientation, and T ap.
interface, VDDIO line must be tied high (i.e., to the interface supply voltage). If VDD is not present and VDDIO is present, the
MMA8453Q is in off mode and communications on the I
communications between other I
bidirectional line used for sending and receiving the data to/from the interface. External pull-up resistors connected to VDDIO are
expected for SDA and SCL. When the bus is free both the lines are high. The I
and Normal mode (100 kHz) I
18
MMA8453Q
There are six configurable interrupts in the MMA8453Q. These are Data Ready, Motion/Freefall, T ap (Pulse), Orientation,
Acceleration data may be accessed through an I
The registers embedded inside the MMA8453Q are accessed through the I
There are two signals associated with the I
Interrupt Register Configurations
Serial I
Table 8. Serial Interface Pin Description
2
Pin Name
C Interface
SCL
SDA
SA0
2
C standards
2
Motion/Freefall
C devices and the MMA8453Q does not affect the I
Figure 11. System Interrupt Generation Block Diagram
Auto-SLEEP
Data Ready
Tap (Pulse)
Orientation
Transient
I
I
I
2
2
2
C Serial Clock
C Serial Data
C least significant bit of the device address
(Table
2
C bus; the Serial Clock Line (SCL) and the Serial Data line (SDA). The latter is a
4).
2
C interface thus making the device particularly suitable for direct interfacing
2
C interface are ignored. The I
INT ENABLE
Pin Description
CONTROLLER
6
INTERRUPT
2
C interface is compliant with Fast mode (400 kHz),
2
C serial interface
2
2
C interface may be used for
C bus.
INT CFG
6
(Table
INT1
INT2
Freescale Semiconductor
8). To enable the I
Sensors
2
C