PF38F2030W0YTQ1 Micron Technology Inc, PF38F2030W0YTQ1 Datasheet - Page 41
PF38F2030W0YTQ1
Manufacturer Part Number
PF38F2030W0YTQ1
Description
Manufacturer
Micron Technology Inc
Datasheet
1.PF38F2030W0YTQ1.pdf
(52 pages)
Specifications of PF38F2030W0YTQ1
Operating Supply Voltage (max)
1.95V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
16.0
16.1
Figure 1.
Table 1.
Datasheet
PSRAM Operations
Power-Up Sequence and Initialization
The PSRAM functionality and reliability are independent of the power-up sequence and slew rate
of the core P-V
reliability are also independent of the power-down sequence and slew rate of the core P-V
The following power-up sequence and register setting should be used before starting normal
operation. The PSRAM power-up sequence is represented in
application, make P-Mode high after fixing P-Mode to a low level for a period of t
high before making P-Mode high. P-CS# and P-Mode are fixed to a high level for period of t
Once the power-up sequence is complete, be sure to set the register, before starting any normal
operation. The register is set by a five-cycle operation. The process involves first performing a
dummy read immediately followed by two continuous reads of the address 0x1FFFFF then
successively writing two specific data. See the flowchart in
of setting the register. Note that P-CS# must be toggling to high for a minimum of 10 ns between
each read or write.
Timing Waveform for Power-Up Sequence
Power-Up Sequence Specifications
P-MODE
Notes:
1.
2.
3.
Parameter
P-VCC
P-CS#
t
t
t
I1
I2
I3
Toggle P-Mode to low when starting the power-up sequence.
t
Does not apply to 38F2020W0ZTQ1, 38F2020W0ZBQ1, 38F2030W0YTQ1,
38F2030W0YBQ1, 38F2030W0ZTQ2, and 38F2030W0ZBQ2,
38F1030W0ZTQ0, 38F1030W0ZBQ0, 38F1030W0YTQE, 38F1030W0YBQE
line items. Valid PSRAM operations for these line items can begin 200 µs after P-
Vcc has reached P-Vcc min.
I1
is specified from when the power supply voltage reaches V
Intel® Wireless Flash Memory (W18/W30 SCSP)
CC
Power application with P-Mode held low
. Any power-up sequence and slew rate is possible under use conditions. PSRAM
Order Number: 251407, Revision: 009
P-CS# high to P-Mode high
P-Mode high to P-CS# low
tI1
Description
tI2
Power Up
Intel® Wireless Flash Memory (W18/W30 SCSP)
tI3
Figure
Min
500
Figure
50
10
CCMIN
2, which illustrates the process
.
1. Following power
Max
—
—
—
Register Setting
I1
Unit
. Make P-CS#
µs
ns
µs
June 2005
CC
Notes
1,2,3
.
I3
.
41