MT48LC2M32B2P-6:G Micron Technology Inc, MT48LC2M32B2P-6:G Datasheet - Page 62

• Manufacturer Part Number: MT48LC2M32B2P-6:G
• Description: IC, SDRAM, 64MBIT, 166MHZ, TSOP-86
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC2M32B2P-6:G

• Organization: 2Mx32
• Density: 64Mb
• Address Bus: 13b
• Access Time (max): 17/7.5/5.5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 180mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Memory Type: DRAM - Sychronous
• Access Time: 5.5ns
• Page Size: 64Mbit
• Memory Case Style: TSOP
• No. Of Pins: 86
• Operating Temperature Range: 0°C To +70°C
• Frequency: 166MHz
• Supply Voltage: 3.3V
• Format - Memory: RAM
• Memory Size: 64M (2Mx32)
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 86-TFSOP (0.400", 10.16mm Width)
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Figure 44:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
DQML, DQMH
COMMAND
BA0, BA1
DQM /
A0-A9
CLK
CKE
A10
DQ
Single WRITE
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Notes:
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
1. For this example, BL = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 10ns is required between <D
3. A8 and A9 = “Don’t Care.”
t CK
to meet
T1
NOP
DISABLE AUTO PRECHARGE
t
WR.
t CMS
t CL
t DS
COLUMN m 3
WRITE
BANK
T2
D
IN
t CMH
t CH
t DH
m
t WR
62
IN
m> and the PRECHARGE command, regardless of frequency,
T3
NOP
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SINGLE BANK
PRECHARGE
ALL BANKS
BANK
T4
T5
NOP
t RP
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Timing Diagrams
ACTIVE
ROW
T6
ROW
BANK
DON’T CARE