MT48LC2M32B2P-6:G Micron Technology Inc, MT48LC2M32B2P-6:G Datasheet - Page 14

• Manufacturer Part Number: MT48LC2M32B2P-6:G
• Description: IC, SDRAM, 64MBIT, 166MHZ, TSOP-86
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC2M32B2P-6:G

• Organization: 2Mx32
• Density: 64Mb
• Address Bus: 13b
• Access Time (max): 17/7.5/5.5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 180mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Memory Type: DRAM - Sychronous
• Access Time: 5.5ns
• Page Size: 64Mbit
• Memory Case Style: TSOP
• No. Of Pins: 86
• Operating Temperature Range: 0°C To +70°C
• Frequency: 166MHz
• Supply Voltage: 3.3V
• Format - Memory: RAM
• Memory Size: 64M (2Mx32)
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 86-TFSOP (0.400", 10.16mm Width)
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Figure 6:
Burst Type
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. M 10/07 EN
M8
0
–
M9
0
1
Mode Register Definition
M7
0
–
Programmed Burst Length
M6–M0
Defined
Single Location Access
to ensure compatibility
–
Write Burst Mode
with future devices.
Accesses within a given burst may be programmed to be either sequential or interleaved;
this is referred to as the burst type and is selected via bit M3.
The ordering of accesses within a burst is determined by the burst length, the burst type
and the starting column address, as shown in Table 5 on page 15.
M11, M10 = “0, 0”
Operating Mode
Standard Operation
All other states reserved
BA0, BA1,
Program
Reserved WB
11
A11
10
A10
M6
0
0
0
0
1
1
1
1
9
A9
M5
Op Mode
0
0
1
1
0
0
1
1
8
M4
A8
0
1
0
1
0
1
0
1
7
A7
14
CAS Latency
6
A6
CAS Latency
5
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
A5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2
3
4
A4
M3
BT
0
1
3
A3
M2
0
0
0
0
1
1
1
1
Burst Length
2
M1
A2
0
0
1
1
0
0
1
1
M0
1
0
1
0
1
0
1
0
1
A1
64Mb: x4, x8, x16 SDRAM
0
A0
Functional Description
Reserved
Reserved
Reserved
Full Page
Burst Type
Interleaved
Sequential
3 = 0
1
2
4
8
Mode Register (Mx)
©2000 Micron Technology, Inc. All rights reserved.
Burst Length
Address Bus
Reserved
Reserved
Reserved
Reserved
M3 = 1
1
2
4
8