MT48LC8M16A2P-7E:G Micron Technology Inc, MT48LC8M16A2P-7E:G Datasheet - Page 69

• Manufacturer Part Number: MT48LC8M16A2P-7E:G
• Description: IC, SDRAM 128MB, SMD, 48LC8, TSOP54
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC8M16A2P-7E:G

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 5.4ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 165mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Access Time: RoHS Compliant
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Operating Temperature Max: 70°C
• Operating Temperature Min: 0°C
• Package / Case: TSOP
• Memory Type: SDRAM
• Memory Configuration: 4 BLK (2M X 16)
• Interface Type: LVTTL
• Rohs Compliant: Yes
• Format - Memory: RAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Compliant

Figure 53:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK 0
T0
ROW
ROW
Alternating Bank Write Accesses
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
T1
NOP
1. For this example, BL = 4.
2. x16: A9 and A11 = “Don’t Care.”
ENABLE AUTO PRECHARGE
x8: A11 = “Don’t Care.”
t CMS
t CL
t DS
COLUMN m 2
BANK 0
WRITE
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
BANK 1
ACTIVE
IN
T4
ROW
ROW
m + 2
69
t DH
t RCD - BANK 1
t DS
D
IN
T5
NOP
m + 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t WR - BANK 0
ENABLE AUTO PRECHARGE
t DS
COLUMN b 2
BANK 1
WRITE
T6
D
IN
t DH
b
128Mb: x4, x8, x16 SDRAM
t DS
D
NOP
IN
T7
b + 1
t RP - BANK 0
t DH
©1999 Micron Technology, Inc. All rights reserved.
t DS
Timing Diagrams
D
IN
NOP
T8
b + 2
t DH
t DS
D
BANK 0
ACTIVE
T9
IN
ROW
ROW
b + 3
t
t
DON’T CARE
RCD - BANK 0
WR - BANK 1
t DH