MT45W8MW16BGX-856 AT Micron Technology Inc, MT45W8MW16BGX-856 AT Datasheet - Page 24

MT45W8MW16BGX-856 AT

Manufacturer Part Number
MT45W8MW16BGX-856 AT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W8MW16BGX-856 AT

Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Bus Configuration Register (BCR)
Figure 18:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
All must be set to “0”
BCR[19]
A[22:20]
Reserved
22–20
0
1
0
BCR[15]
0
1
BCR[18]
Register
A[19:18]
Select
19–18
0
0
1
Bus Configuration Register Definition
BCR[13]
Must be set to “0”
BCR[14]
0
0
0
0
1
1
1
1
0
1
Synchronous burst access mode
Asynchronous access mode (default)
Reserved
Select RCR
Select BCR
Select DIDR
Notes:
17–16
A[17:16]
BCR[12] BCR[11]
BCR[10]
0
0
1
1
0
0
1
1
Fixed
Variable (default)
Register Select
Operating Mode
0
1
Operating
Initial Access Latency
Mode
15
A15
0
1
0
1
0
1
0
1
The BCR defines how the CellularRAM device interacts with the system memory bus.
Page mode operation is enabled by a bit contained in the RCR. Figure 18 describes the
control bits in the BCR. At power-up, the BCR is set to 9D1Fh.
The BCR is accessed with CRE HIGH and A[19:18] = 10b or through the register access
software sequence with DQ = 0001h on the third cycle.
1. Burst wrap and length apply to both READ and WRITE operations.
Active LOW
Active HIGH (default)
Latency
Initial
Code 8
Code 1–Reserved
Code 2
Code 3 (Default)
Code 4
Code 5
Code 6
Code 7–Reserved
14
Latency Counter
A14
WAIT Polarity
A13
13 12 11
Counter
Latency
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
A12 A11 A10
Polarity
WAIT
10
Must be set to “0”
Reserved
9
A9
Configuration (WC)
24
BCR[8]
WAIT
0
1
8
A8
Must be set to “0”
Asserted one data cycle before delay (default)
Asserted during delay
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Page/Burst CellularRAM 1.5 Memory
Reserved
A7
7
BCR[5]
WAIT Configuration
0
0
1
1
Setting is ignored
(Default to “0”)
BCR[3]
0
1
Reserved
BCR[4]
BCR[2]
0
1
0
1
6
A6
0
0
0
1
1
Burst wraps within the burst length
Burst no wrap (default)
Others
BCR[1] BCR[0]
Full
1/2 (default)
1/4
Reserved
0
1
1
0
1
Drive Strength
Drive Strength
5
A5
©2004 Micron Technology, Inc. All rights reserved.
Burst Wrap (Note 1)
1
0
1
0
1
4 words
8 words
16 words
32 words
Continuous burst (default)
Reserved
4
A4
Burst Length (Note 1)
Wrap (BW)
Burst
3
A3
1
Length (BL)
2
A2 A1 A0
Burst
1
0
1

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