M48T513V-85CS1 STMicroelectronics, M48T513V-85CS1 Datasheet - Page 10

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M48T513V-85CS1

Manufacturer Part Number
M48T513V-85CS1
Description
Manufacturer
STMicroelectronics
Type
NVSRAMr
Datasheet

Specifications of M48T513V-85CS1

Word Size
8b
Organization
512x8
Density
4Mb
Interface Type
Parallel
Access Time (max)
85ns
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temp Range
0C to 70C
Pin Count
32
Mounting
Surface Mount
Supply Current
60mA
Lead Free Status / RoHS Status
Supplier Unconfirmed
M48T513Y, M48T513V
OPERATING MODES
Figure 5, page 5 illustrates the static memory array
and the quartz controlled clock oscillator. The
clock locations contain the century, year, month,
date, day, hour, minute, and second in 24 hour
BCD format. Corrections for 28, 29 (leap year), 30,
and 31 day months are made automatically. The
nine clock bytes (7FFFFh-7FFF9h and 7FFF1h)
are not the actual clock counters, they are memory
locations consisting of BiPORT
memory cells within the static RAM array.
The M48T513Y/V includes a clock control circuit
which updates the clock bytes with current infor-
mation once per second. The information can be
accessed by the user in the same manner as any
other location in the static memory array. Byte
7FFF8h is the clock control register. This byte con-
trols user access to the clock information and also
stores the clock calibration setting.
Byte 7FFF7h contains the watchdog timer setting.
The watchdog timer can generate either a reset or
Table 6. Operating Modes
Note: X = V
10/31
Deselect
WRITE
READ
READ
Deselect
Deselect
Mode
1. See Table 10, page 16 for details.
IH
or V
IL
; V
V
SO
SO
= Battery Back-up Swit chover Voltage.
4.5 to 5.5V
3.0 to 3.6V
to V
V
V
PFD
or
SO
CC
(1)
(min)
(1)
READ/WRITE
V
V
V
V
E
X
X
IH
IL
IL
IL
V
V
G
X
X
X
X
IH
an interrupt, depending on the state of the Watch-
dog Steering Bit (WDS). Bytes 7FFF6h-7FFF2h
include bits that, when programmed, provide for
clock alarm functionality. Alarms are activated
when the register content matches the month,
date, hours, minutes, and seconds of the clock
registers. Byte 7FFF1h contains century informa-
tion. Byte 7FFF0h contains additional flag informa-
tion pertaining to the watchdog timer, the alarm
condition and the battery status. The M48T513Y/V
also has its own Power-Fail Detect circuit. This
control circuitry constantly monitors the supply
voltage for an out of tolerance condition. When
V
the TIMEKEEPER register data and external
SRAM, providing data security in the midst of un-
predictable system operation. As V
control circuitry automatically switches to the bat-
tery, maintaining data and clock operation until
valid power is restored.
IL
CC
is out of tolerance, the circuit write protects
V
V
V
W
X
X
X
IH
IH
IL
DQ0-DQ7
High Z
High Z
High Z
High Z
D
D
OUT
IN
Battery Back-up Mode
CMOS Standby
Standby
Power
Active
Active
Active
CC
falls, the

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