SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 38
SAA7114HV2T
Manufacturer Part Number
SAA7114HV2T
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2T.pdf
(144 pages)
Specifications of SAA7114HV2T
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Philips Semiconductors
SAA7114_3
Product data sheet
Fig 26. Horizontal timing diagram (50/60 Hz)
50 Hz
60 Hz
The signals HREF, HS, CREF2 and CREF are available on pins RTS0 and/or RTS1 (see
Table 56
The signals HREF and HS are also available on pin XRH (see
programming range
programming range
(step size: 8/LLC)
(step size: 8/LLC)
and
expansion port
HREF (50 Hz)
HREF (60 Hz)
Table
CVBS input
data output
HS (50 Hz)
HS (60 Hz)
Rev. 03 — 17 January 2006
CREF2
CREF2
CREF
CREF
57); their polarity can be inverted via RTP0 and/or RTP1.
108
107
720
720
5
1
processing delay ADC to expansion port:
2/LLC
2/LLC
2/LLC
2/LLC
140
1/LLC
0
0
PAL/NTSC/SECAM video decoder
burst
12
16
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Table
2/LLC
2/LLC
138
144
2/LLC
2/LLC
58).
sync clipped
SAA7114
2
2
2/LLC
2/LLC
mhb542
107
106
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