SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 76
SAA7114HV2T
Manufacturer Part Number
SAA7114HV2T
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2T.pdf
(144 pages)
Specifications of SAA7114HV2T
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Philips Semiconductors
10. I
Table 35:
[1]
SAA7114_3
Product data sheet
Code
S
Sr
SLAVE ADDRESS W
SLAVE ADDRESS R
ACK-s
ACK-m
SUBADDRESS
DATA
P
Fig 41. I
If pin RTCO strapped to supply voltage via a 3.3 k resistor.
a. Write procedure.
b. Read procedure (combined).
2
C-bus description
S
2
C-bus format
Description of I
10.1 I
SLAVE ADDRESS W
The SAA7114 supports the ‘fast mode’ I
400 kbit/s).
Description
START condition
repeated START condition
0100 0010 (42h, default) or 0100 0000 (40h)
0100 0011 (43h, default) or 0100 0001 (41h)
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte; see
data byte; see
automatically incremented
STOP condition
2
Sr
S
C-bus format
2
C-bus format
SLAVE ADDRESS W
SLAVE ADDRESS R
ACK-s
Table
37; if more than one byte DATA is transmitted the subaddress pointer is
Table 36
Rev. 03 — 17 January 2006
SUBADDRESS
ACK-s
ACK-s
and
Table 37
SUBADDRESS
(n bytes + acknowledge)
2
C-bus specification extension (data rate up to
[1]
[1]
ACK-s
DATA
data transferred
PAL/NTSC/SECAM video decoder
(n bytes + acknowledge)
ACK-m
ACK-s
DATA
data transferred
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
mhb340
P
SAA7114
ACK-s
mhb339
P
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