TXN174310850F16 Intel, TXN174310850F16 Datasheet - Page 28

• Manufacturer Part Number: TXN174310850F16
• Manufacturer: Intel

Specifications of TXN174310850F16

• Optical Fiber Type: TX/RX
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Mounting: Screw
• Lead Free Status / RoHS Status: Compliant

Table 47.
Table 48.
Table 49.
Table 50.
Intel
Datasheet
28
®
TXN17431 (0850) 10.3 Gbps 850 nm Optical Transceiver Compliant with XENPAK MSA
PHY_XS Status 2 Register (DID = 4h, Address = 8h) (Sheet 2 of 2)
PHY_XS Lane Status Register (DID = 4h, Address = 18h)
PHY_XS Test Control Register (DID = 4h, Address = 19h)
PHY_XS Control 2 Register (DID = 4h, Address = c000h) (Sheet 1 of 2)
15:13
15:3
11:8
9:0
9:4
1:0
Bit
Bit
Bit
Bit
11
10
12
11
10
15
14
13
12
3
2
1
0
2
Transmit local fault
detect
Receive local fault
detect
Reserved
Reserved
XGXS transmit lane
alignment
PHY_XS pattern testing
ability
PHY_XS loopback ability
Reserved
Lane 3 synchronization
Lane 2 synchronization
Lane 1 synchronization
Lane 0 synchronization
Reserved
XGXS test pattern
enable
Test pattern select
XAUI system loopback
data out enable
XAUI system loopback
XAUI PRBS enable
XAUI Analog Monitor
Point Control
Reserved
Functionality
Functionality
Functionality
Functionality
0 = No fault detected
1 = Transmit local fault detected
0 = No fault detected
1 = Receive local fault detected
–
–
0 = Lanes no aligned
1 = Lanes aligned
0 = Capable of PHY_XS pattern testing
1 = Capable of PHY_XS loopback ability
–
0 = Lane not in synch
1 = Lane in synch
0 = Lane not in synch
1 = Lane in synch
0 = Lane not in synch
1 = Lane in synch
0 = Lane not in synch
1 = Lane in synch
–
0 = Disable
1 = Enable
00 = High speed
01 = Low speed
10 = Mixed speed
11 = Reserved
0 = Transmit all ones when in PHY_XS loopback mode
1 = Transmit data at TXOUT when in PHY_XS loopback
1 = Enable loopback (transmit -> receive path)
0 = Not enabled
1 = Enable PRBS
0 = XAUI lane 3 recovered clock
1 = XAUI lane 3 recovered data
–
mode
Description
Description
Description
Description
Intel
®
TXN17431 (0850) Optical Transceiver
Document Number: 306425-005
2-Nov-2007
Access
Access
Access
Access
RO, LH
RO, LH
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
–
–
–
–
–